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UVM SystemVerilog Discussions

Use this forum when your question is about SystemVerilog language issues in the context of UVM. These can be about how to use a language feature is user code with the UVM or about language usage inside the UVM BCL.

516 topics in this forum

  1. Erroneous buffer size comparison in uvm_sequencer_param_base.svh

    By basarts,
    • 0 replies
    • 19 views

  2. [REG_PREDICT_COLLISION] Collision detected for register ...

    By Ryan100,
    • 1 reply
    • 106 views

  3. uvm_reg_field.get_access() method returns wrong value

    By Petr Kobiersky,
    • 1 reply
    • 81 views

  4. how to unpack payload?

    By swapnilm,
    • 12 replies
    • 12,944 views

  5. AHB , bus2reg , reg2bus in hrdata & hwdata

    By soleshka,
    • 1 reply
    • 77 views

  6. constraint dist 'others'

    By ljepson74,   
    • 3 replies
    • 744 views

  7. UVM_FATAL Errors

    By Hash,
    • 7 replies
    • 8,159 views

  8. UVM RAL implementation methodology for large designs

    By rgarciaf071,   
    • 1 reply
    • 219 views

  9. Unresolved reference to 'create_item' in $root.create_item !!!!

    By qinhailiang,
    • 2 replies
    • 3,388 views

  10. How can I print out Logs left-aligned?

    By karlzhao,
    • 2 replies
    • 1,706 views

  11. Possible bug: UVM 1.2,IEEE: uvm_transaction.svh, etc.

    By kaushalmodi,   
    • 2 replies
    • 228 views

  12. Volatile bit set for RO registers

    By Narendra,
    • 0 replies
    • 127 views

  13. monitor output is delayed due to run_phase ordering

    By Khushi,
    • 1 reply
    • 492 views

  14. Do we need to use two monitors one each for input and output

    By Khushi,
    • 1 reply
    • 331 views

  15. UVM phase jumping to extract phase

    By sharvil111,   
    • 1 reply
    • 1,364 views

  16. Cause of UVM Timeout

    By sas73,
    • 3 replies
    • 180 views

  17. drive same sequence to multiple driver

    By Khushi,
    • 2 replies
    • 469 views

  18. unsuccessful factory override

    By ori,
    • 2 replies
    • 171 views

  19. Alternate Scoreboarding approach

    By svuvmuser,   
    • 1 reply
    • 684 views

  20. End of test in UVM-1.2

    By asic_bg,
    • 0 replies
    • 660 views

  21. Behavior of uvm_sequence_base::kill method

    By Taichi Ishitani,
    • 0 replies
    • 128 views

  22. Returning event from virtual function

    By DanaL,
    • 1 reply
    • 200 views

  23. Property in assertion

    By venkatasubbarao_Sutrave,
    • 1 reply
    • 470 views

  24. Individual uvm_reg_field exclusion from uvm_reg_hw_reset_seq possible?

    By obajaj,
    • 1 reply
    • 394 views

  25. uvm_reg_bit_bash_seq

    By Suguna R,
    • 1 reply
    • 258 views
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