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Found 6 results

  1. Can a distribution value_range be a list? Or is there way to achieve the same result using "dist"? As shown by non-working example code, I try to do something like this: bit [1:0] twobits; assert(std::randomize(twobits) with {twobits dist {2'b10:=50, inside{2'b00,2'b11,2'b01;}:/50};} ); //INCORRECT assert(std::randomize(twobits) with {twobits dist {2'b10:=50, [2'b00,2'b11,2'b01]:/50};} ); //INCORRECT "18.5.4 Distribution" image snippet from IEEE_Std1800-2017 LRM attached. Is there (isn't there) a way that value_range can be a list of choices, which
  2. Can a single constraint be used across an array of objects? i.e. affecting the relation between a property which exists in each of those objects? I'm trying to do something like an array reduction or sum, but instead of performing it on an array, performing it on the properties of objects in an array. My goal is to better understand the capabilities of constraints. Example below: (I do not show my failed attempts.) //Class animal_c has a property "weight". //A dynamic array is generated where each element points to an animal. //The cumulative weight of the animals should be 1
  3. *, How can I randomize with a dist and specify a weight for values not being inside a range? class randclass; rand logic [3:0] randvalue; function void post_randomize(); $display("value: %0d",randvalue); endfunction constraint inside_practice { randvalue dist { [3:4] :/ 50, !(inside {[3:4]}) :/ 50 //<--- I try to have a sort of 'others' category here }; } endclass module top; randclass randclass; initial begin randclass = new(); repeat (10) begin randclass.randomize(); end $finish(); end endmo
  4. Here is a sample code of what I'm working on class c_cfg extends uvm_object; rand bit c_bit; constraint c_turnoff { c_bit == 1'b0; } ........... endclass: c_cfg 2nd file class b_cfg extends uvm_object; rand c_cfg cfg_c; ........ ........ endclass: b_cfg main file class a_cfg extends b_cfg; // I want to overwrite the constraint in c_cfg here. // I want that to be 1 endclass: a_cfg I tried overwriting the constraint in c_cfg by using the same constraint name in a_cfg, but it doesn't solve (I guess it is becaus
  5. With the following code, import uvm_pkg::*; `include "uvm_macros.svh" class seq_data extends uvm_sequence_item; `uvm_object_utils(seq_data) rand bit [7:0] addr; rand bit [7:0] data; constraint c_addr {addr >=1000;addr<2000;} constraint c_data {data >=0000;data<=4000;} function new (string name = "",uvm_component parent=null); super.new(name); endfunction virtual function void display (); `uvm_info (get_type_name (), $sformatf ("addr = 0x%0h, data = 0x%0h", addr, data), UVM_LOW); endfunct
  6. Yesterday, I learned that when randomize is called, all active constraints in the scope must be met ... even if you are passing a specific member as an argument to the randomize call. i.e. If you try to randomize a specific class member by passing it to the randomize call, like this: randomize(var2), all constraints in the scope of the randomize must still be met, even if they have nothing to do with the member being randomized. ***Someone please jump in if I phrased that poorly or am incorrect. In the below example there are two variables and a constraint on one. Uncommenting the li
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