Mark Strickland

Section 18.5.14 of the 2017 LRM says "when there is no solution that satisfies all active hard constraints (if any) simultaneously with a constraint defined as soft, the solver shall discard that soft constraint and find a solution that satisfies the remaining constraints". In this case, there is a solution that satisfies all the constraints, unaligned_transfer == 0. I am guessing you hoped that the "solve..before" would mean unaligned_transfer was first chosen sometimes to be 1, thus making the soft constraint not satisfiable. However, 18.5.10 states "solve..before" does not change legal sets, just distributions within the legal set: "Adding this order constraint does not change the set of legal value combinations, but alters their probability of occurrence"

Can you show what you see originally and what you want to see?

Is it the case that you see the message "Register __ value read from DUT (__) does not match mirrored value (__) (valid bit mask = __)" and the value shown for "read from DUT" matches your expectations but the value for "mirrored value" does not? In that case, the first step is to make sure you have a uvm_reg_predictor that is working correctly.

This is a poll on how users are currently working with the UVM library and exploring what might help migration to the latest version. The poll is divided up due to a limit on the number of questions allowed by polling on this platform.

This is a poll on how users are currently working with the UVM library and exploring what might help migration to the latest version. The poll is divided up due to a limit on the number of questions allowed by polling on this platform.

That uvm_macros.svh fix is the correct fix and is now in https://www.accellera.org/images/downloads/standards/uvm/UVM-18002-2020-11tar.gz