Mark Strickland
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Can you show what you see originally and what you want to see?
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field.mirror() task not working as expected
Mark Strickland replied to shreyasraju's topic in UVM SystemVerilog Discussions
Is it the case that you see the message "Register __ value read from DUT (__) does not match mirrored value (__) (valid bit mask = __)" and the value shown for "read from DUT" matches your expectations but the value for "mirrored value" does not? In that case, the first step is to make sure you have a uvm_reg_predictor that is working correctly. -
This is a poll on how users are currently working with the UVM library and exploring what might help migration to the latest version. The poll is divided up due to a limit on the number of questions allowed by polling on this platform.
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This is a poll on how users are currently working with the UVM library and exploring what might help migration to the latest version. The poll is divided up due to a limit on the number of questions allowed by polling on this platform.
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That uvm_macros.svh fix is the correct fix and is now in https://www.accellera.org/images/downloads/standards/uvm/UVM-18002-2020-11tar.gz