UVM SystemVerilog Discussions

596 topics in this forum

1. How to using package rightly in UVM?

   By wszhong631, June 30, 2014
   • 2 replies
   • 10.2k views
   • 
   • dave_59
   • June 30, 2014

2. how to Constraint dynamic array

   By wszhong631, June 7, 2014   

   • dynamic array constraint
   • 1 reply
   • 7.6k views
   • 
   • wszhong631
   • June 10, 2014

3. run time issue questa sim

   By Attaluri, June 3, 2014
   • 7 replies
   • 6.5k views
   • 
   • tudor.timi
   • June 5, 2014

4. Running testcase in Questasim

   By kirankumar2904, May 30, 2014
   • 2 replies
   • 2.6k views
   • 
   • kirankumar2904
   • June 4, 2014

5. Accessing Memory model from various sequences

   By silverstream, May 27, 2014
   • 6 replies
   • 5.4k views
   • 
   • dave_59
   • June 3, 2014

6. assert(std::randomize(variable)) when assertions are turned off

   By sachinp123, May 23, 2014
   • 3 replies
   • 4.1k views
   • 
   • uwes
   • May 28, 2014

7. how to drive a clocking block output asynchronously

   By mastrick, May 21, 2014
   • 3 replies
   • 9.1k views
   • 
   • tudor.timi
   • May 23, 2014

8. fixed-size arrays : Do they not 'support' size()?

   By ljepson74, April 17, 2014   

   • size()
   • array
   • (and 5 more)

     Tagged with:

     • size()
     • array
     • fixed size array
     • fixed-size array
     • built in method name
     • $size
     • irun
   • 3 replies
   • 18.5k views
   • 
   • ljepson74
   • May 2, 2014

9. Rnadomize a variable inside a function

   By qwerty, April 29, 2014
   • 2 replies
   • 3.6k views
   • 
   • dave_59
   • April 29, 2014

10. Handling protocol extensions

    By tudor.timi, April 28, 2014   

    • UVC
    • 3 replies
    • 2.3k views
    • 
    • David Black
    • April 29, 2014

11. SystemVerilog connecting a channel

    By quarryman, April 28, 2014
    • 0 replies
    • 1.1k views
    • 
    • quarryman
    • April 28, 2014

12. interfaces initialization inside internal module

    By drianf0, April 25, 2014   

    • SystemVerilog
    • Interface
    • 3 replies
    • 7.2k views
    • 
    • kirloy
    • April 28, 2014

13. overriding a registered local variable in a sequence from test

    By sathyakiran.p, April 23, 2014   

    • set_config_string
    • sequence
    • (and 1 more)

      Tagged with:

      • set_config_string
      • sequence
      • override
    • 2 replies
    • 3.9k views
    • 
    • sathyakiran.p
    • April 24, 2014

14. How can I upgrade all `uvm_error to be `uvm_fatal ?

    By ljepson74, April 7, 2014   

    • UVM_ERROR
    • UVM_FATAL
    • (and 2 more)

      Tagged with:

      • UVM_ERROR
      • UVM_FATAL
      • messaging
      • override
    • 7 replies
    • 10.3k views
    • 
    • David Black
    • April 19, 2014

15. How to write a good Makefile in VCS for running UVM tests?

    By liya, March 11, 2014   

    • UVM
    • 2 replies
    • 16.7k views
    • 
    • David Black
    • April 10, 2014

16. Good practice

    By flyball, March 11, 2014   

    • coding style
    • best practice
    • (and 1 more)

      Tagged with:

      • coding style
      • best practice
      • macros
    • 2 replies
    • 4.5k views
    • 
    • ljepson74
    • April 10, 2014

17. How to monitor DUT outputs from a test/sequence?

    By delon0001, March 28, 2014   

    • sequence
    • monitor
    • (and 4 more)

      Tagged with:

      • sequence
      • monitor
      • agent
      • test
      • uvm
      • tlm
    • 1 reply
    • 8.6k views
    • 
    • steve
    • April 1, 2014

18. uvm component name constraints

    By cbriggs, March 28, 2014
    • 1 reply
    • 3.7k views
    • 
    • uwes
    • March 29, 2014

19. UVM_FATAL invokes $finish(1)

    By LehKui, September 12, 2013   

    • UVM_FATAL
    • finish
    • 11 replies
    • 8.1k views
    • 
    • dave_59
    • March 26, 2014

20. register a register call back to a reg_block model

    By JonMccallum, March 11, 2014   

    • uvm_reg_cbs
    • 1 reply
    • 4.1k views
    • 
    • steve
    • March 25, 2014

21. UVM phase singletons

    By tudor.timi, March 20, 2014
    • 4 replies
    • 6k views
    • 
    • tudor.timi
    • March 25, 2014

22. functional coverage collection - what is collected?

    By ljepson74, March 11, 2014   

    • ncsim
    • coverpoint
    • (and 3 more)

      Tagged with:

      • ncsim
      • coverpoint
      • functional coverage
      • assertion based coverage
      • covdut
    • 2 replies
    • 4.2k views
    • 
    • ljepson74
    • March 24, 2014

23. glitches and their solution

    By amitk3553, March 24, 2014
    • 0 replies
    • 1.2k views
    • 
    • amitk3553
    • March 24, 2014

24. overriding uvm report severity

    By zagiace, March 5, 2014
    • 3 replies
    • 3.6k views
    • 
    • zagiace
    • March 21, 2014

25. uvm_event in uvm 1.2

    By ejo, March 17, 2014
    • 7 replies
    • 4.7k views
    • 
    • dave_59
    • March 19, 2014