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UVM_FATAL invokes $finish(1)
LehKui posted a topic in UVM SystemVerilog DiscussionsTo circumvent UVM calling on $finish directly when completing normally, one would override "finish_on_completion" to 0 before calling "run_test()". What I do is: uvm_top.finish_on_completion = 0; run_test(); $finish(2); The last statement tells the tool to publish useful simulation statistics such as total run time, memory used, etc. This information is very useful in monitoring large batches of simulations for many purposes, among which is farm optimisation and debugging bad code consuming lots of memory. However, when UVM_FATAL is invoked, effectively a $finish(1) is called - and the above-mentioned information is thrown away. Is there a way to overcome this and get UVM to call $finish(2) or at least allows this to be customised? Probably via a uvm_config_db::set() and uvm_config_db::get() ? Or perhaps I am not aware of something that already allows this? A work-around would be avoid using UVM_FATAL and use UVM_ERROR with a following $finish(2) - but this is clumsy and widespread change is required. Thanks