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Showing results for tags 'test'.
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Hi Guys, I have a simple framework for an IP level testbench, written using UVM-SC libraries. The intent is to be able to pump basic AHB write/read request to the DUT(in System C) using this BFM. I have created all basic components, snippet for which are pasted below. I have an ahb_sequencer, which is just an extension oh uvm_sequencer with specific ahb_transaction type. In ahb_driver run_phase is as under: void run_phase(uvm::uvm_phase phase) { REQ req, rsp; for(;;) { UVM_INFO(this->get_name(), " -
I am learning UVM. So far I was able to create the following environment for my DUT. Agents with monitors, drivers and sequences for all of the input-output interfaces from my DUT. A top level UVM env. Sequences to send valid data to DUT. I yet to implement scoreboard. I'm having some trouble to understand how to handle scenarios like following: For one of my tb->dut interfaces, TB needs to wait for an event (or transaction) from DUT. Once it receives the transaction from DUT, TB needs to send back a response. What is the best way to implement this? How can I monitor DUT transacti