mastrick Posted May 21, 2014 Report Share Posted May 21, 2014 Our uvm_driver derivatives push values into the RTL via clocking blocks in interfaces. This updates the signals synchronously as we typically want, but is there a recommended way to add an asynchronous update of the signal to model a change that could occur when asynchronous reset is applied? We see that if we just assign to the signal at the interface level (not the clocking block level), we get a conflict between both assignments. Quote Link to comment Share on other sites More sharing options...
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