Attaluri Posted June 3, 2014 Report Share Posted June 3, 2014 I ran a testcase using questa sim,i am getting following output. ** Error: (vsim-3601) Iteration limit reached at time 0 ps testcase run phase look like this. it printed info messages from below code then gave above mentioned error. task run_phase(uvm_phase phase); phase.raise_objection(this); `uvm_info(get_type_name(), "Starting test",UVM_NONE) // generate register settings assert (m_cfg_gen.randomize()) else `uvm_fatal(get_name(),"m_cfg_gen randomization failed"); `uvm_info(get_type_name(), $psprintf("Using this configuration:\n%s",m_cfg_gen.sprint()),UVM_MEDIUM) #20000ns; phase.drop_objection(this); `uvm_info(get_type_name(), "Stopping test...", UVM_LOW ); endtask : run_phase Please help me in resolving this Quote Link to comment Share on other sites More sharing options...
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