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run time issue questa sim

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I ran a testcase using questa sim,i am getting following output.



** Error: (vsim-3601) Iteration limit reached at time 0 ps



testcase run phase look like this. it printed info messages from below code then gave above mentioned error.


  task run_phase(uvm_phase phase);

    `uvm_info(get_type_name(), "Starting test",UVM_NONE)
    // generate register settings
    assert (m_cfg_gen.randomize()) else
    `uvm_fatal(get_name(),"m_cfg_gen randomization failed");
    `uvm_info(get_type_name(), $psprintf("Using this configuration:\n%s",m_cfg_gen.sprint()),UVM_MEDIUM)
    `uvm_info(get_type_name(), "Stopping test...", UVM_LOW );
    endtask : run_phase
Please help me in resolving this
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Hi Dave -- I have gone through manual and used file break points.

I figured out simulator is looping through below code in  

file :-   uvm-1.1d/src/base/uvm_task_phase.svh 

function:virtual function void execute(uvm_component comp,

                                          uvm_phase phase);
my concern here is thier is not exactly any loop in this code .but stepping is only looping from top to bottom of below code.


        // reseed this process for random stability
        proc = process::self();
        proc.srandom(uvm_create_random_seed(phase.get_type_name(), comp.get_full_name()));
        if ($cast(seqr,comp))
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