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UVM (Pre-IEEE) Methodology and BCL Forum

Forum for posting questions about the pre-IEEE UVM library and its application to verification environments. 

941 topics in this forum

  1. Are there any recommendations/guidelines on using UVM run sub phases?

    By mramdas,   
    • 0 replies
    • 1k views

  2. Complicated Register Modeling with uvm_reg

    By Logger,   
    • 0 replies
    • 1.9k views

  3. Why we get SEQREQZMB when jumping to another phase

    By zhiharev,
    • 2 replies
    • 2.7k views

  4. What is a proper way to set fields and update register in uvm register model?

    By timothy,   
    • 1 reply
    • 5.6k views

  5. Query related to UVM_RAL_REG model.

    By Kameshwar Rao,
    • 1 reply
    • 1.1k views

  6. issue about read write-only register via backdoor

    By mrforever,   
    • 1 reply
    • 3.5k views

  7. Usage of get_hdl_path() for backdoor register access

    By gaurav_brcm,
    • 0 replies
    • 2.2k views

  8. Communication between uvm_sequence and uvm_component

    By amar712,   
    • 3 replies
    • 2k views

  9. RAL mapping reg_field to another reg_field

    By defmaxou,
    • 1 reply
    • 774 views

  10. how to use uvm_in_order_comparator

    By mrforever,
    • 3 replies
    • 3.2k views

  11. priority for uvm_reg transactions

    By proo,   
    • 0 replies
    • 1.5k views

  12. multiple maps on ral class

    By elihai,   
    • 0 replies
    • 1.5k views

  13. Turn off `uvm_info messages

    By amar712,   
    • 3 replies
    • 2.9k views

  14. UVM Sequencer base class - Virtual task using local class variables - bad coding style?

    By sri.cvcblr,   
    • 1 reply
    • 1.4k views

  15. build_phase order

    By hevangel,   
    • 2 replies
    • 1.5k views

  16. Two grabbing sequences both win arbitration at the same time

    By walkeranderson,
    • 4 replies
    • 2.3k views

  17. handle to uvm_component in uvm_object

    By dipling,   
    • 1 reply
    • 1.1k views

  18. UVM RAL - Register Verification for Different Access types

    By sanket_gajjar,   
    • 0 replies
    • 2.6k views

  19. How to use the Memory Allocation Manager

    By Louis,
    • 2 replies
    • 3.4k views

  20. UVM Read Problems

    By kiranbhaskar,
    • 12 replies
    • 7.6k views

  21. Multiple architectures - which one?

    By ericdecker70,
    • 0 replies
    • 479 views

  22. uvm_random_stimulus usage

    By kumarv,
    • 4 replies
    • 1.4k views

  23. Disadvantages of abstract classes instead of virtual interfaces?

    By gbbrown,
    • 4 replies
    • 6.8k views

  24. Why doesn't this virtual interface connection crash and burn

    By mkorpi,   
    • 1 reply
    • 852 views

  25. multiple interfaces accessing the same uvm_reg

    By sudheerv,
    • 0 replies
    • 807 views
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