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saxmanlogic

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  1. We ran across an issue when updating registers containing W1C fields. Specifically, if any field of the CSR requires an update, then calling the parent register's update() results in all W1C fields being written with 1. Example: register CTL has field GO with access type W1C in bit 31. It has field CMD with access type RW in bits 3:0. Both fields have reset value of 0. So, coming out of reset, we do: CTL.CMD.set(2); CTL.update(); The actual transfer goes out with data of 32'h8000_0002. Nobody asked for bit 31, but there it is. The issue appears to be with uvm_reg_field method Xupdate
  2. Given a class that defines a field: bit [31:0] foo [4];and with said field added to field automation: `uvm_field_sarray_int(foo, UVM_ALL_ON)I proceed to add a call to my component's build_phase to obtain the results of any configuration changes: void'(uvm_config_db#(bit[31:0])::get(this, $psprintf("foo[%0d]",i), foo[i]));Doesn't compile.I try: void'(uvm_config_db#(bit[31:0][4])::get(this, "foo"), foo));Doesn't compile. It try various other possible permutations. Eventually, I arrive using typedef to avoid syntax limitations in the parameterization clause: typedef bit[31:0] DW; typ
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