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Showing results for tags 'uvm_reg_field'.
Hi all, I found a possible bug in the UVM register layer. It is in file uvm_reg_field.svh at line 728-730: // Assume that the entire field is enabled if (!be) return; This causing a problem in a specific corner case. The following conditions need to met: - You have a bus in your env with byte enable feature, for example APB - You have a register in your design which have a register field which crossing a byte enable border, for example in a 16 bit register there is a 16 bit width field - In your env you monitor all your register accesses and the
In my test sequence, some fields of a register are changed frequently and others are keep previous value. I wrote the code like below, register.fieldY.set(value) register.update(status) // first update ... other code regsiter.fieldY.set(new_value) register.update(status) // second update The first update was processed but the second update was not seen in the system bus. I digged into UVM manual and implementation, and found out that 'update' function doesn't update mirrored value. By change, new_value was same to reset value of fieldY. So at that time the second update was call
Hi, I wanted to use the field.mirror() task provided in the uvm_reg_field class to check only a particular field. However, I see that the field.mirror() task is just calling the parent register mirror task. Hence the entire register is read and compared which I didn't intend to do. I tried this in my sequence and I see the above mentioned behavior. This looks like a serious bug. Can you please confirm this. Regards, Shreyas