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SystemC Language

1,230 topics in this forum

  1. How to schedule interrupt to trigger for next time?

    By Minu,   
    • 2 replies
    • 326 views

  2. Type casting and concatenation

    By amitk3553,
    • 8 replies
    • 7.3k views

  3. MSAN issue with DECLARE_EXTENDED_PHASE macro

    By tmp_sc,   
    • 0 replies
    • 158 views

  4. Dynamic Module in SystemC

    By Mohammad,
    • 1 reply
    • 249 views

  5. Synthesize SystemC code in Vitis HLS 2022.1

    By Dpk,
    • 4 replies
    • 521 views

  6. Valgrind issue with sc_event

    By DS1701,
    • 3 replies
    • 768 views

  7. Issue with Autoconf and SystemC installation

    By tmp_sc,   
    • 2 replies
    • 266 views

  8. Is Y[(G%M)*(1<<N)*(G/M)] = X.read()[G] allowed?

    By acc_sysC,
    • 2 replies
    • 171 views

  9. How to do this port declaration in systemC? Verilog declaration: input [$clog2(N)-1] X;

    By acc_sysC,
    • 3 replies
    • 233 views

  10. Any good Example of TLM generic payload extension .. with Initialtor and Target socckets

    By chaitusvk,
    • 2 replies
    • 214 views

  11. Can pow() be directly used as size of port during port declaration?

    By acc_sysC,
    • 2 replies
    • 209 views

  12. was not declared in this scope error

    By acc_sysC,
    • 5 replies
    • 274 views

  13. Timer with interrupts using Loosely Timed Implementation

    By Minu,   
    • 1 reply
    • 226 views

  14. How to Print DEBUG_MSG in "sysc/kernel/sc_runnable_int.h"

    By chaitusvk,   
    • 1 reply
    • 253 views

  15. How to implement adding function using next_trigger in SC_METHOD?

    By Minu,
    • 3 replies
    • 298 views

  16. In Which function of Systemc Code thread Switch happen ?

    By chaitusvk,   
    • 2 replies
    • 202 views

  17. gdb for systemc model

    By LaoShaw,
    • 1 reply
    • 341 views

  18. Should SystemC model be exactly same as the RTL in terms of the architecture of each module?

    By acc_sysC,
    • 2 replies
    • 209 views

  19. Is it possible to perform AND operation on two ports and connect them while instatiating?

    By acc_sysC,
    • 2 replies
    • 264 views

  20. Error: (E529) insert module failed: simulation running

    By acc_sysC,
    • 7 replies
    • 403 views

  21. What happens in SC_HAS_PROCESS()?

    By tanlt,
    • 2 replies
    • 648 views

  22. Assign sc_lv to sc_vector<sc_signal<sc_logic>>>

    By Stefan,
    • 0 replies
    • 204 views

  23. Compiling SystemC on ARM

    By Matthias Jung,   
    • 3 replies
    • 1.1k views

  24. Systemc with HLSlibs channels

    By Diamantis,
    • 2 replies
    • 287 views

  25. sc_fifo reset

    By Ramon Fried,
    • 3 replies
    • 358 views
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