Diego Posted May 15, 2023 Report Share Posted May 15, 2023 Hello, I'm implementing a class where I want to expose the state of a module, which is determined by a sc_signal<bool>. The closed/opened state of an electrical sca_rswitch to be more precise. The API client must be able to set the state and reads the same value if a get is called. As far as I understood, doing the following is not enough, because the signal will be updated only in the "update" phase. sc_signal<bool> my_signal; my_signal = true; ASSERT(signal, true); My question is how can I manually force the update phase? I've been using sc_start with zero time to achieve this: sc_signal<bool> my_signal; my_signal = true; sc_start(sc_core::SC_ZERO_TIME); ASSERT(signal, true); But I believe there's a better way. It has also the drawback that after doing this, the simulation is already started, which limits the manipulation of other parameters. I appreciate any feedback. Thanks Quote Link to comment Share on other sites More sharing options...
karthickg Posted May 15, 2023 Report Share Posted May 15, 2023 Why do you need an sc_signal<bool>? Why not - just bool? Quote Link to comment Share on other sites More sharing options...
Diego Posted May 15, 2023 Author Report Share Posted May 15, 2023 Because I need to bind it with a sc_in<bool>. Reading the documentation I understood that it would be necessary to bind it with a sc_signal<bool>. I've just try binding with a pure bool and it does not seems to compile. Am I missing something? Quote Link to comment Share on other sites More sharing options...
David Black Posted May 15, 2023 Report Share Posted May 15, 2023 sc_signal is designed to model concurrent assignment and therefore requires update at the after the current delta cycle completes. What you are asking for is a channel that doesn't care about race conditions. For that you can write your own implementation, but it sounds dangerous to me. If you don't understand the above, you probably need to either read the standard specification thoroughly or take a god course on SystemC fundamentals. SystemC is not something you can just learn on the job. I've seen too many engineers fall flat on their faces due to misunderstanding the fundamentals of discrete event-driven simulation and the mechanisms of SystemC. Make sure you have a solid C++ background as well. Diego 1 Quote Link to comment Share on other sites More sharing options...
maehne Posted June 12, 2023 Report Share Posted June 12, 2023 @Diego: What the above replies by @karthickg and @David Black are not taking into account is that you are using the sca_eln:sca_de::sca_rswitch from the SystemC AMS extensions. Its ctrl input will get sampled with the time step associated with the cluster of instantiated ELN modules. Therefore, you need to ensure that the SystemC simulation time advances when executing your embedded software in the TLM/DE part of your model. To this end, you will need to issue wait statements in the appropriate places, e.g., inside the instruction set simulator / CPU model executing your embedded software or inside the API calls, which interact with the hardware. It heavily depends on the modeling style of the rest of your system. Anyway, reading the boolean control signal in the get() member function is the right approach to reflect the state of the sca_rswitch. Quote Link to comment Share on other sites More sharing options...
David Black Posted June 21, 2023 Report Share Posted June 21, 2023 @maehneGood point. Quote Link to comment Share on other sites More sharing options...
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