djmoore Posted June 8, 2023 Report Share Posted June 8, 2023 Good Day, I was using the example risc_cpu from systemc-2.3.4.zip from your website. I used the default file test.asm and the branch instruction [bne R5, R6, -6] does not work. I see what may be some type of issue with timing or handshake, etc. I debugged some and see clear_branch(), and branch_valid() seem to be done and causing branch_target_address.write() to be done at the wrong time. Do you have updated code that emulates the instructions correctly for systemc-2.3.4.zip or later codebase? Thanks Doug Moore Quote Link to comment Share on other sites More sharing options...
maehne Posted June 8, 2023 Report Share Posted June 8, 2023 I suggest that you test whether this problem is present when building SystemC and the example from the official public Git repository and otherwise raise this issue/provide a PR on the GitHub issue tracker so that it gets seen by the people involved in the development of the proof-of-concept simulator. Quote Link to comment Share on other sites More sharing options...
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