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SystemC Language

1,241 topics in this forum

  1. Static sc_vpool objects to cause initialization order fiasco

    By Julien,   
    • 10 replies
    • 656 views

  2. unexpected VCD dump value

    By zidane,
    • 10 replies
    • 656 views

  3. ac_math test code compilation error

    By scsc,
    • 4 replies
    • 436 views

  4. Unable to initialize a vector of integers

    By otl0rz,
    • 4 replies
    • 669 views

  5. Enabling all warnings while compilation

    By Saikat,   
    • 3 replies
    • 316 views

  6. Variable declared as an 'inline' field in c++14

    By scsc,
    • 3 replies
    • 1.4k views

  7. Cannot notify an event from pthread to SystemC process

    By DS1701,
    • 6 replies
    • 1k views

  8. gcc 9.3.0

    By sumit_tuwien,
    • 2 replies
    • 478 views

  9. Instantiating SystemC module in Verilog: not seeing 1-cycle flop latency

    By coderoo,
    • 3 replies
    • 731 views

  10. Use SC_THREAD to realize delay

    By scsc,
    • 2 replies
    • 619 views

  11. Const array inside SC_CTOR

    By scsc,
    • 4 replies
    • 415 views

  12. double to sc_fix(ed) conversion

    By scsc,
    • 5 replies
    • 926 views

  13. C++20 Co-routines

    By Matthias Jung,
    • 0 replies
    • 622 views

  14. A model of an algorithm is created and tested. What is a way to make transition from the SystemC model to software implementation?

    By Igor Plastov,
    • 2 replies
    • 335 views

  15. Cannot write sc_signal

    By sumit_tuwien,
    • 7 replies
    • 649 views

  16. sc_fixed is undefined in VS 2017

    By scsc,
    • 2 replies
    • 696 views

  17. In constructor ‘tb::tb(sc_core::sc_module_name)’: ./tb.h:18:41: error: no match for call to ‘(sc_core::sc_fifo_in<myStruct_t>) (myStruct_t&)’

    By HTP,
    • 3 replies
    • 511 views

  18. SystemC communication with Linux kernel Module

    By zafir,
    • 4 replies
    • 885 views

  19. sc_report_handler affects the simulation itself

    By haase,
    • 4 replies
    • 563 views

  20. Quick Threads assembly for aarch64

    By ant_dev,   
    • 1 reply
    • 580 views

  21. Need help to implement an interrupt controller simulator which handles the ISR

    By Jomon,   
    • 6 replies
    • 819 views

  22. Verifying SystemC model with Verilog/SV testbench

    By Nithin,
    • 3 replies
    • 685 views

  23. Data lost in transmission

    By bitfield,   
    • 4 replies
    • 434 views

  24. Question about expected behavior of wait event with delta cycle timeout

    By Yi-Chung.Lee,
    • 3 replies
    • 645 views

  25. Google profiler / address sanitizer with systemC to detect memory leaks (without --enabled-pthread)

    By aniket2610,
    • 2 replies
    • 550 views
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