Jump to content

Toggle Accellera Systems Initiative Accellera Systems Initiative

  Forum Stats Last Post Info


General information from Accellera Systems Initiative

  • 1 topics
  • 0 replies
Welcome! - last post by Admin


Announcements from Accellera Systems Initiative

  • 5 topics
  • 0 replies
Accellera Web Site Migration - last post by Lynn Bannister

In the News

Press Releases and Media Coverage from Accellera Systems Initiative

  • 27 topics
  • 0 replies
DVCon: The Imitation Game - last post by Admin

Toggle IEEE 1735/IP Encryption IEEE 1735/IP Encryption

  Forum Stats Last Post Info


IEEE 1735/IP Encryption general discussion.

  • 4 topics
  • 1 replies
Grammar - last post by Dave Graubart


  Forum Stats Last Post Info


IP-XACT general discussion.

  • 20 topics
  • 61 replies
Passing parameters via hier... - last post by fredmorton

Toggle OCP (Open Core Protocol) OCP (Open Core Protocol)

  Forum Stats Last Post Info


OCP general discussion.

  • 3 topics
  • 4 replies
MDatalast signal behaviour... - last post by Scott

Toggle SystemC SystemC

  Forum Stats Last Post Info

SystemC Language

  • 438 topics
  • 1,590 replies
SystemC Assertion Library - last post by fcunha

SystemC AMS (Analog/Mixed-Signal)

  • 58 topics
  • 264 replies
AMS modeling - last post by dakupoto

SystemC TLM (Transaction-level Modeling)

  • 152 topics
  • 419 replies
at_example from doulos - last post by bknpk

SystemC Synthesizable Subset v1.4 Public Review

Use this forum to provide feedback on the SystemC Synthesizable Subset Version 1.4 draft. The review period will end May 11, 2015.

  • 1 topics
  • 1 replies
Welcome to the Public Revie... - last post by Roman Popov

Toggle UVM (Universal Verification Methodology) UVM (Universal Verification Methodology)

  Forum Stats Last Post Info

UVM 1.2 Public Review

Use this forum to provide feedback on the UVM 1.2 release. The review period will end October 1, 2014.

  • 25 topics
  • 58 replies
Getting field names of a pa... - last post by uwes

Methodology and BCL Forum

Use this forum for posting questions about the UVM library and its application to verification environments.

  • 848 topics
  • 2,675 replies
Communication in UVM regist... - last post by zgl5566

UVM SystemVerilog Discussions

Use this forum when your question is about SystemVerilog language issues in the context of UVM. These can be about how to use a language feature is user code with the UVM or about language usage inside the UVM BCL.

  • 377 topics
  • 933 replies
uvm sequence - last post by ljepson74

Simulator Specific Issues

Use this forum to discuss tool-specific usage and flow issues.

  • 147 topics
  • 408 replies
Compiling UV - last post by PlayDough

UVM Commercial Announcements

Use this forum for announcements from UVM ecosystem solution providers including products, demos, videos, training, webinars, etc.

  • 61 topics
  • 47 replies
You have a need for speed.... - last post by Adam Sherilog

UVM Surveys

This forum is for the use of the Accellera UVM-WG to ask the UVM community for input. Therefore, all posts will be monitored.

  • 6 topics
  • 1 replies
Runtime synchronization sur... - last post by mbhaduri

Toggle Commercial Announcements Commercial Announcements

  Forum Stats Last Post Info


In this forum, EDA companies may post information about events, videos, training, webinars, and other announcements.

  • 1 topics
  • 0 replies
Mediatek looking for Verifi... - last post by ron76

Recent Topics

  • 8,649 Total Posts
  • 5,898 Total Members
  • stephengc2 Newest Member
  • 68 Most Online

23 users are online (in the past 15 minutes)

0 members, 23 guests, 0 anonymous users   (See full list)

Bing, Google, Yahoo