yyn Posted September 21, 2011 Report Share Posted September 21, 2011 Dear, I am simulating on IES using AXI UVC from Cadence. And the register is written using "write()" task from UVM. In this case, "reg2bus()" of register adapter class translates uvm_reg_bus_op into vr_axi_master_burst which is a sequence item of AXI. Also, "bus2reg" function updates bus_item into uvm_reg_bus_op. But transactions for setting registers are sent as non-blocking way. I want to implement blocking way. Blocking operation means that transaction for the next register is sent after transaction of the current register is sent and that transaction is ended. But, currently the second transaction is started before the previous transaction of AXI interface is ended. I want to control blocking operation in register adapter. How can I impelemt register adapter class? Thanks & Regards, //yyn Quote Link to comment Share on other sites More sharing options...
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