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kock last won the day on August 14 2020

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  1. Hi Kushi, The standard contains Annex C.3 complexBaseExpression which can be any of the following: — realExpression (see C.3.1) — signedLongintExpression (see C.3.2) — stringExpression (see C.3.3) — stringURIExpression (see C.3.4) — unsignedBitExpression (see C.3.5) — unsignedBitVectorExpression (see C.3.6) — unsignedIntExpression (see C.3.7) — unsignedLongintExpression (see C.3.8) — unsignedPositiveIntExpression (see C.3.9) — unsignedPositiveLongintExpression (see C.3.10) If an IP-XACT element is of a type that is mentioned here, then its value can be an expre
  2. Hi Mats, As you say, you can add a special address block with a width of 128 (or more). The width indicates the maximum number of bits that can be accessed in a single transaction. This address block can contain registers with a size equal to the width or smaller. Best regards, Erwin
  3. Hi Mats, Yes, my understanding is that SCR 7.5 "The size of any register shall be no greater than the width of the containing address block" also applies to virtual registers. Best regards, Erwin
  4. Hi Galong, I only know of https://github.com/kactus2 but I never used it so I do not know what quality of documentation is generated. There are commercial solutions that do exactly what you ask for. Some of the vendors are mentioned here https://www.accellera.org/community/ip-xact/ecosystem/. Best regards, Erwin
  5. Hi Kushi, No you should not describe it like that to avoid ".". You can avoid the separator by putting pathSegments in different elements. So in a field you put "fld", in a register you put "reg". The two segments can be put together then as reg.fld by a generator. I do not have an example at end. Best regards, Erwin
  6. Hello Kushi, The intended and recommended way is to avoid the path separator "." inside a pathSegment Name. For this reason, the element is called named pathSegment since it describes a segment of the path. However, it is not illegal to use the path separator inside a pathSegment and sometime this cannot be avoided. Best regards, Erwin
  7. Hi Kushi, No, you cannot describe this using the IP-XACT schema. You may want to introduce a vendor extension for that. Best regards, Erwin
  8. Hello Kushi, Yes indeed you can think of this as arrays of parameters. Section 6.12.6 Module parameters also describes these vectors and arrays. For module parameters, the arrays described the unpacked dimensions of a parameter and the vectors describe the packed dimensions. So for parameter [3:0] PARAM [7:0], [3:0] is a vector and [7:0] is an array. For parameters it works the same as for module parameters, although a parameter does not directly describe an HDL language parameter. Best regards, Erwin
  9. Hi Kushi, Objects such as address blocks, registers files, and registers are not allowed to overlap or to be interleaved. So you cannot create a register array with gaps and interleave it with another register array with gaps. Instead you can create a register file array. Each element in the register file array can contain multiple registers or even register files. The register files can thus be nested. So indeed, certain things, you can only express using register files. You cannot describe registers without IP-XACT registers because IP-XACT registers do appear in IP-XACT register fil
  10. Hi Kushi, No this is not possible. For the next revision of IP-XACT we propose a stride element which indicates the distance between two array elements. For now you have the following options: A) make your register 64 bit wide, B) unroll the registers and do not use dim, C) create a register file with range 8 (64 bits) and dim 8 and put the register in the register file. Best regards, Erwin
  11. Hi Kushi, A register file is a group of registers. The group has its own range and dimension, so you can see it as an array. Assume register file RF with offset 0, range 8, and dimension 2 containing two registers A and B at offsets 0 and 4. Then there are two occurences of register A at offsets 0 and 8 and two occurences of registers B at offsets 4 and 12. You cannot describe this without register files unless you unroll all registers. Best regards, Erwin
  12. Hi Kushi, The user guide does not explain this. Section 12 and 13 and Annex H of the standard explaining addressing. It is not very easy to read though. Best regards, Erwin
  13. Hi Kushi, That completely depends on the UVM register model generator that you use. It is tool dependent. Best regards, Erwin
  14. Hi Kushi, A normal memory map is accessible through a slave bus interface; a local memory map is not. A local memory map is local to the component. You can describe internal registers in it, for instance, for a CPU. A local memory map is described with an address space that can be referenced from a cpu element. The current IEEE std. 1685-2014 does not allow separate definition and instantiation of registers. The Accellera IP-XACT Working Group is working on a proposal for a revision of the standard that does support that. Best regards, Erwin
  15. Hi Kushi, You need to describe the complete system in IP-XACT including the masters with their address spaces. For each master, the address map can be computed and a UVM register model can be generated. Different masters would be able to see the same registers at different locations then. As far as I know, UVM does not support the same register at different addresses allowing write to a register via one address and read of that register via another address. Best regards, Erwin
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