maehne

@AvritSase: Your answer is unrelated to the issue discussed in this thread.

Glad I could help! You have grasped the idea correctly.

To achieve activation of your TDF controller only once per 5 activations of the valve and water tank modules, you will need to assign in addition to the time step also consistent rates to the TDF ports. E.g., you could assign to the TDF controller outputs command and threshold a rate of 5. Then, the connected valve and water tank modules will be activated 5 times per activation of the controller. As then the water tank will also output 5 times a water level sample to be read by the controller module, you will also need to assign a rate of 5 to the controller's input port. At this point, the TDF cluster is still not schedulable, as you have a feedback loop, which requires the insertion of a proper number of delay samples to achieve causality. To this end, you could, e.g., assign a delay of 5 to the controller input. For better understanding of the basic concepts of TDF modeling, I strongly suggest that you read at least the section 2.1 "Modeling fundamentals" of the SystemC AMS User's Guide available from the Accellera website.

@Martin Barnasconi is of course right about that there is no SCA_ELN_MODULE macro defined in the SystemC AMS standard, as it is currently not possible to define own primitive ELN modules. Personally, I prefer to avoid the use of preprocessor macros in C++ as much as possible -- especially when a fully equivalent concise proper C++ syntax exist. In the context of SystemC (AMS) the macros SC_MODULE, SCA_TDF_MODULE, SC_CTOR, and SCA_CTOR obfuscate in my humple opinion more the code than they help to render SystemC models more readable. Your class LifELN is very probably a class derived from sc_core::sc_module (SC_MODULE) and which contains the netlist of your ELN model (i.e., a circuit of ELN primitives). The time step needs to be set always on at least one instance of a primitive SystemC AMS module, which is part of a cluster of connected SystemC AMS primitive modules. Therefore, your second approach: is the correct one.

I have forwarded your issue to @karsten from COSEDA Technologies, as he is the principal author of the SystemC AMS PoC implementation.

Thanks for reporting these compilation issues! These will need to get addressed by the COSEDA Technologies GmbH with a new SystemC AMS release. In the meantime, you can fix the compilation issue by replacing: pobj->sca_name() with this->name() The calls to memcpy() and memset() need to get prefixed with the std:: namespace prefix. The "register" storage class specifiers can be safely removed. If I see it correctly, they are only remaining in file scams/impl/analysis/ac/sca_ac_domain_entity.cpp.

You seem to use the right approach of using an SC_MODULE to describe the structure of your circuit of ELN primitives. The macros SCA_ELN_MODULE and SCA_TDF_MODULE are exclusively used to define primitive modules in the respective MoCs, which describe the behaviour of the primitive, but not their inner structure. The statement from the SystemC AMS LRM regarding setting the time step refers to the set_timestep() member function, which is offered by all SystemC AMS primitive modules. To keep my models flexible, I tend to prefer to set the time step from the test bench or top level module by calling the set_timestep() member function of one of the accessible primitive AMS modules in that scope, i.e., usually a stimuli source. E.g., if you have instantiated a sca_eln:sca_vsource src1("src1", 2.0); you would call src1.set_timestep(10.0, sc_core::SC_US); to set the time step of the module src1 and the connected ELN cluster to 10 us. I hope that this answers your primary question. I definitely recommend you to read the SystemC AMS User's Guide to get a better insight into the fundamental concepts of SystemC AMS. It is an unfortunate situation that it is currently so hard to find as it is only provided as a bundled download together with the outdated Accellera SystemC AMS 1.0 standard. You can download it from the Accellera's SystemC standards page, where it is listed as "AMS 1.0" in the "Previous releases" section. The statements from this User's Guide are still relevant. It only lacks discussion of the advanced Dynamic TDF modelling features, which were added in SystemC AMS 2.0 and are also part of IEEE Std 1666.1-2016. Unfortunately, efforts to update the user's guide to the current SystemC AMS standard version got stalled due to lack of time of the involved people in the working group.

Thanks for the clarification and feedback on the fix suggested by Philipp!

Dear Guillaume, thanks for reporting this issue! I have forwarded your report to the Language Working Group for further analysis. From a first look, this is indeed a change in behaviour of the SystemC proof-of-concept implementation from version 2.3.1 to 2.3.2. However, it does not seem to touch the standard IEEE Std 1666-2011, as the latter does not mention member function `get_protocol_types()`. Regards, Torsten

As you can see from the DDS block diagram, which you posted, the structure of DDS block is quite simple. I therefore would model it as a single TDF module containing the accumulator register as a state variable. As input, you will have your frequency control and phase offset control signals. The frequency control signal basically is the value, which you continuously add to the value in your accumulator register to generate a periodic sawtooth signal (due to the overflow of the accumulator). The phase offset control signal gets added to the accumulator register to enable shifting the phase of the sawtooth signal. This sawtooth signal is interpreted as the angle operand of a sine function. The period of the sawtooth signal represents a full revolution on the phase circle, i.e., the 2^L possible sawtooth signal values are evenly mapped to phase angles in the range of 0 rad to 2 pi rad (0° to 360°). To avoid repeated calculations of the sine function, the sine amplitudes for all possible angles are pre-calculated and stored in a look-up table (LUT). The current value of the sawtooth signal is then used as the index into that look-up table to find the corresponding output amplitude. To implement this in a generic DDS TDF module, I would choose M, L, and K (bit widths) as generic parameters, which can be passed upon DDS module instantiation to the DDS module's constructor. From M and L, you can calculate the value for the modulo operation, which models in software your overflowing of a M-bits-wide and L-bits-wide addition operation. The difference of M and L gives you the shift distance needed to implement your accumulator output quantisation. The sine LUT needs to have 2^L entries. The sine function should be scaled by 2^(k-1)-1 to use the full range of a k bit wide signed output. All these preparatory calculations, you can do in your DDS module's constructor. The processing function then only needs to only implement the two additions and the amplitude look-up based on the current values of the frequency and phase control inputs and the current value stored in the accumulator register. If you plan to use this kind of module in a model of communication system, you might consider having a look to the Vienna SystemC AMS Building Block Library, which is available for download from systems-ams.org. The latter web site contains also other useful SystemC AMS resources.

Well, you will have to write a test bench, which provides your RC filter with some stimuli for transient simulation or sets up an AC analysis. However, I recommend you to have first a closer look to the fundamental concepts and ideas of SystemC AMS. A good introduction to SystemC AMS is provided by the SystemC AMS extensions User's Guide, which is part of the SystemC AMS extensions 1.0 release. Even though, this discusses only the features available sind SystemC AMS 1.0, it is a good start as SystemC AMS 2.0 and IEEE Std 1666.1 added mainly advanced features related to Dynamic TDF and bug fixes. Also, the SystemC AMS community pages provide some good links to introductory resources to get started with SystemC AMS.

Thanks for providing this feedback on the SystemC PoC implementation! It would help if you could share some more details about the exact error messages as well as a minimal self-contained example exposing the problem you are observing. Then, we may discuss the issue more seriously.

Thanks for reporting this Aarm64-specific issue! I have forwarded it to the Language Working Group's bug tracker so that we can have a look. Support for Aarm64 in SystemC is relatively new. To help localise the source of the problem, could you try whether it helps to configure SystemC to use Pthreads instead of QuickThreads in addition to `--enable-debug --disable-optimize`?

It is up to the IEEE P1666 working group to decide, which currently experimental SystemC API features become official part of a future IEEE Std 1666 revision. The companies/people involved in the maintenance of the SystemC PoC simulator are also actively involved in this standardisation effort. The implementation of experimental features into the PoC implementation serve as a testbed to gain experience with them and collect feedback on their functionality, usability, and usefulness and real world applications. That is important input for the standardisation process.

If it is necessary for you to stick with SystemC 2.3.1, you can simply comment out the offending line in systemc.h. The function is nowhere used inside the proof-of-concept implementation of SystemC.

Yes, this change in behaviour of SystemC 2.3.2 with respect to SystemC 2.3.1 is intentional to better conform to IEEE Std 1666-2011, which states in clause 6.4.4 about signal writes under the SC_MANY_WRITERS policy: This fix by @Philipp A Hartmann is documented in the RELEASENOTES of SystemC 2.3.2:

@David Black: Did you yet find the time to attempt to fix the sem_init issue on macOS?

Thanks Sumit for reporting these issues! I have reported them to the Language Working Group so that we can try to fix them in the proof-of-concept implementation. Regards, Torsten

Regarding sc_simcontext, this class is not part of IEEE Std 1666-2011! It is an implementation artefact, which should not concern you as a user. The proof-of-concept implementation uses it for house-keeping and managing the global state of the simulation kernel.

If you are interested in the elaboration and simulation semantics of SystemC, have a look to clause 4 of IEEE Std 1666-2011. The simulation semantics are based on the discrete-event model of computation and employ the concept of delta cycles to achieve determinism of the simulation results. This is very close to other hardware description languages such as VHDL. Using your favourite search engine, you can find additional information such as the following two tutorials: John Moondanos "SystemC Tutorial" Federico Angiolini "SystemC Tutorial" which give a brief summary of these semantics and the core ideas of SystemC. Though, please take into account that both tutorials are 10+ years old, which means that certain aspects have evolved considerably. For a good introduction to SystemC, I suggest that you read a good book on the topic, such as "SystemC from the Ground Up" by David Black et al. To efficiently use SystemC, you have to master the core concepts of C++ first.

This issue has been fixed in the SystemC 2.3.2 release available from the Accellera website. The function std::gets was definitely removed in the C'11 standard and deprecated in the C++'11 standard so that recent compilers do not provide it anymore as its semantics constitutes a security risk due to buffer overflows.

I am afraid, this is a question, which only @David Black or one of his co-authors of the book can answer. As far as I can remember, I could never find the advertised online material under the URL mentioned in the book. Nevertheless, I still consider it one of the best books on the topic of SystemC.

Thanks for your analysis David! I have reported this issue to the SystemC Language Working Group.

You need to be more precise in your problem description! You did not post the exact error message you might have obtained nor is your code example complete and self-contained. Therefore, any answer by us is mostly based on wild guessing. Please note that you will only actually see traces in your VCD files if actually events happened during your simulation. If your sc_module example constitutes your Design Under Verification, you are missing at least in the posted code snippet some stimuli generator, which would trigger any events. I suggest you that you get familiar with C++ and then start with a good introduction tutorial / book on SystemC before pursuing your own modeling attempts.

Hello Sumit, for compiling SystemC using CMake for C++'17, you will have to specify the C++ language standard version through the variable CMAKE_CXX_STANDARD. The value "17" is only supported since CMake 3.8. If you are still using an older version, this might explain your compilation problems. Enable verbose output for your build system to check which flags are effectively passed to your compiler. Passing the C++ standard version via the "-std=c++17" compiler switch ist more fragile when using CMake, as the latter might add conflicting additional flags. Regards, Torsten