uwes

hi, i added the mantis branch mantis_3521 which fixes both 3521 and 3594 /uwe

hi, i filed http://eda.org/svdb/view.php?id=3626 and added a bugfix in the mantis branch: /uwe

hi, if you run with a UVM version shipped with IES you can do that easily. just push your sequence fiber into the waveform and you see start/end/hoerarchy of all your sequences. /uwe

hi, both use cases can be simply mapped: 1 this would be a sequence A starting the other sequences in parallel. in you phase hook you would start the A sequence 2 the simplest framework is to use the uvm_sequence_library which is actually a meta-sequence and allows you quite easy starts of associated sequences using various patterns. /uwe

hi bart, can you supply a testcase or file a mantis to look at?

hi, i guess this is http://eda.org/svdb/view.php?id=3594

hi, according the LRM -2005/-2009 the chained function calls are illegal. there are discussions tracked here (http://eda.org/svdb/view.php?id=2735) which might lead to an 1800-2012 improvement.

hi, you might use your sequencer from within the sequence via get_sequencer() or when using the uvm_declare_p_sequencer() macro plus the p_sequencer field. once you know your sequencer you can traverse the way you want. as alternativ you can use jade's suggested path or you could use the uvm_config_db to share your config under a known key and access the db from any place such as within a sequence.

dave, i agree with your points that very often two contradicting requirements have to be met. however i'd like to see that SV is making the decision between "stable" OR "random" much simpler. >Random stability issues are a natural part of any testbench environment that one has to deal with, just like race conditions, and process synchronization. This might be true for SV/UVM/OVM BUT i havent seen these kind of issues in the Specman world. So to me its not necessarily a TB specific problem its rather a language+semantic issue. /uwe

hi, welcome to UVM - one thing to remember from the beginning is that fields and methods named m_* should be considered UVM private fields which should NOT be used in user code. /uwe

hi, UVM11 is not yet officially released yet. so you cant download it officially via the accellera page - however as noted you can simply get a snapshot from the sourceforge repository. you should checkout the UVM_1_1 tag. /uwe

hi dave, normally i would expect to fix the "issue" or "root cause" before i go an teach everyone howto to avoid it. random stability issues are unexpected and are (to me) too easily introduced into the code base. /uwe

hi, random stability issues are usually not simulator issues. unfortunately the SV LRM makes it too easy to disturb the random stability.

hi, the issue you mention should be fixed in UVM11 according to the mantis. /uwe

hi, phasing has changed completely with UVM10 compared to UVM10EA. you should try to map your UVM10EA phasing to the UVM10 predefined phases to make your life easier. if you really require private phases you may want to look at the examples in the developer tree. for instance here: http://uvm.git.sourceforge.net/git/gitweb.cgi?p=uvm/uvm;a=tree;f=tests/40phasing;h=573c37ea2ba747e30ae8a72bd2c1c0d2ee974584;hb=ca15160dae193029b8f55d7dd9e9c159ed28fda3

hi, have a look at the LRM sect. 6.21. talking about "scope" and "lifetime". "local" refers to scope and visibility - "static" refers to lifetime of the variable.

hi, there is no crc function predefined neither in SV nor in UVM (althrough there is an uvm_oneway_hash). depending upon what you want to do with that function it might have different solutions with SV+UVM. - you really require a particular CRC function to compute a CRC as required in a protocol - you require a hash function which maps a set of values into a single unique value (one way hash function)

hi, as the message indicates you cant say anymore in uvm11 "somesequence.start_item(somesequence)" or within a sequence simply "start_item(somesequence)". you have to use "somesequence.start(null)" instead. /uwe

hi, you cant give an SV implementation of that class as SV doesnt give you access to the information+functionality needed. also this is only an prototype showing the api its not something you may "extend" or use otherwise. /uwe

hi, phase_runner_proc holds the process handle of the phaser (executing the phases via uvm_phase::m_run_phases())

hi, macros are not executed - macros are expanded. lets take a simple example (created with DVT macro expand) `uvm_component_utils_begin(test) `uvm_field_int(cfg_field_set, UVM_DEFAULT) `uvm_field_int(cfg_field_notset, UVM_DEFAULT) `uvm_component_utils_end get finally expanded into a typedef, some functions, a const type name typedef uvm_component_registry #(test,"test") type_id; static function type_id get_type(); return type_id::get(); endfunction virtual function uvm_object_wrapper get_object_type(); return type_id::get(); endfunction const static string type_name = "test"; virtual function string get_type_name (); return type_name; endfunction function void __m_uvm_field_automation (uvm_object tmp_data__, int what__, string str__); begin test local_data__; /* Used for copy and compare */ typedef test ___local_type____; string string_aa_key; /* Used for associative array lookups */ /* Type is verified by uvm_object::compare() */ super.__m_uvm_field_automation(tmp_data__, what__, str__); if(tmp_data__ != null) /* Allow objects in same hierarchy to be copied/compared */ if(!$cast(local_data__, tmp_data__)) return; begin case (what__) UVM_CHECK_FIELDS: begin __m_uvm_status_container.do_field_check("cfg_field_set", this); end UVM_COPY: begin if(local_data__ == null) return; if(!((UVM_DEFAULT)&UVM_NOCOPY)) cfg_field_set = local_data__.cfg_field_set; end UVM_COMPARE: begin if(local_data__ == null) return; if(!((UVM_DEFAULT)&UVM_NOCOMPARE)) begin if(cfg_field_set !== local_data__.cfg_field_set) begin void'(__m_uvm_status_container.comparer.compare_field("cfg_field_set", cfg_field_set, local_data__.cfg_field_set, $bits(cfg_field_set))); if(__m_uvm_status_container.comparer.result && (__m_uvm_status_container.comparer.show_max <= __m_uvm_status_container.comparer.result)) return; end end end UVM_PACK: if(!((UVM_DEFAULT)&UVM_NOPACK)) begin if($bits(cfg_field_set) <= 64) __m_uvm_status_container.packer.pack_field_int(cfg_field_set, $bits(cfg_field_set)); else __m_uvm_status_container.packer.pack_field(cfg_field_set, $bits(cfg_field_set)); end UVM_UNPACK: if(!((UVM_DEFAULT)&UVM_NOPACK)) begin if($bits(cfg_field_set) <= 64) cfg_field_set = __m_uvm_status_container.packer.unpack_field_int($bits(cfg_field_set)); else cfg_field_set = __m_uvm_status_container.packer.unpack_field($bits(cfg_field_set)); end UVM_RECORD: if(!((UVM_DEFAULT)&UVM_NORECORD)) begin __m_uvm_status_container.recorder.record_field("cfg_field_set", cfg_field_set, $bits(cfg_field_set), uvm_radix_enum'((UVM_DEFAULT)&(UVM_RADIX))); end UVM_PRINT: if(!((UVM_DEFAULT)&UVM_NOPRINT)) begin __m_uvm_status_container.printer.print_int("cfg_field_set", cfg_field_set, $bits(cfg_field_set), uvm_radix_enum'((UVM_DEFAULT)&UVM_RADIX)); end UVM_SETINT: begin bit matched; __m_uvm_status_container.scope.set_arg("cfg_field_set"); matched = uvm_is_match(str__, __m_uvm_status_container.scope.get()); if(matched) begin if((UVM_DEFAULT)&UVM_READONLY) begin uvm_report_warning("RDONLY", $sformatf("Readonly argument match %s is ignored", __m_uvm_status_container.get_full_scope_arg()), UVM_NONE); end else begin if (__m_uvm_status_container.print_matches) uvm_report_info("STRMTC", {"set_int()", ": Matched string ", str__, " to field ", __m_uvm_status_container.get_full_scope_arg()}, UVM_LOW); cfg_field_set = uvm_object::__m_uvm_status_container.bitstream; uvm_object::__m_uvm_status_container.status = 1; end end __m_uvm_status_container.scope.unset_arg("cfg_field_set"); end endcase end begin case (what__) UVM_CHECK_FIELDS: begin __m_uvm_status_container.do_field_check("cfg_field_notset", this); end UVM_COPY: begin if(local_data__ == null) return; if(!((UVM_DEFAULT)&UVM_NOCOPY)) cfg_field_notset = local_data__.cfg_field_notset; end UVM_COMPARE: begin if(local_data__ == null) return; if(!((UVM_DEFAULT)&UVM_NOCOMPARE)) begin if(cfg_field_notset !== local_data__.cfg_field_notset) begin void'(__m_uvm_status_container.comparer.compare_field("cfg_field_notset", cfg_field_notset, local_data__.cfg_field_notset, $bits(cfg_field_notset))); if(__m_uvm_status_container.comparer.result && (__m_uvm_status_container.comparer.show_max <= __m_uvm_status_container.comparer.result)) return; end end end UVM_PACK: if(!((UVM_DEFAULT)&UVM_NOPACK)) begin if($bits(cfg_field_notset) <= 64) __m_uvm_status_container.packer.pack_field_int(cfg_field_notset, $bits(cfg_field_notset)); else __m_uvm_status_container.packer.pack_field(cfg_field_notset, $bits(cfg_field_notset)); end UVM_UNPACK: if(!((UVM_DEFAULT)&UVM_NOPACK)) begin if($bits(cfg_field_notset) <= 64) cfg_field_notset = __m_uvm_status_container.packer.unpack_field_int($bits(cfg_field_notset)); else cfg_field_notset = __m_uvm_status_container.packer.unpack_field($bits(cfg_field_notset)); end UVM_RECORD: if(!((UVM_DEFAULT)&UVM_NORECORD)) begin __m_uvm_status_container.recorder.record_field("cfg_field_notset", cfg_field_notset, $bits(cfg_field_notset), uvm_radix_enum'((UVM_DEFAULT)&(UVM_RADIX))); end UVM_PRINT: if(!((UVM_DEFAULT)&UVM_NOPRINT)) begin __m_uvm_status_container.printer.print_int("cfg_field_notset", cfg_field_notset, $bits(cfg_field_notset), uvm_radix_enum'((UVM_DEFAULT)&UVM_RADIX)); end UVM_SETINT: begin bit matched; __m_uvm_status_container.scope.set_arg("cfg_field_notset"); matched = uvm_is_match(str__, __m_uvm_status_container.scope.get()); if(matched) begin if((UVM_DEFAULT)&UVM_READONLY) begin uvm_report_warning("RDONLY", $sformatf("Readonly argument match %s is ignored", __m_uvm_status_container.get_full_scope_arg()), UVM_NONE); end else begin if (__m_uvm_status_container.print_matches) uvm_report_info("STRMTC", {"set_int()", ": Matched string ", str__, " to field ", __m_uvm_status_container.get_full_scope_arg()}, UVM_LOW); cfg_field_notset = uvm_object::__m_uvm_status_container.bitstream; uvm_object::__m_uvm_status_container.status = 1; end end __m_uvm_status_container.scope.unset_arg("cfg_field_notset"); end endcase end end endfunction

]hi, as this is an UVM forum you may use the following for the regex: // untested code :-) chandle r = dpi_regcomp(".*[RST|CK]_CTRL.*"); if(dpi_regexec(r,regs[i].get_name()) $display("found"); dpi_regfree(r); you can wrap this into a function to beautify it. /uwe

hi, the simple model is: 1. start your sequences automatically via the phase hooks 2. if you use seq.start() and expect the sequences to bject phase progression make sure you set the seq.starting_phase appropriate 3. for sequences objecting phase progression make a derived class like the following and use it as base for active sequences virtual class uvm_active_sequence #(type REQ=int,RSP=REQ) extends uvm_sequence#(REQ,RSP); virtual task pre_body(); if(starting_phase) starting_phase.raise_objection(this, "master seq active"); endtask virtual task post_body(); if(starting_phase) starting_phase.drop_objection(this, "master seq inactive"); endtask function new(string name ="uvm_active_sequence"); super.new(name); endfunction endclass if you have a more advanced model with sequences spawning phases and sequences acitvely starting other sequences which do require access to the phasing system you probably need a hand crafted solution depending upon your exact requirements. /uwe

hi, you simply start the sequence library on a sequencer (or have it started automatically via the default_sequence hook). there is no explicit association between sequences and a sequencer anymore (which was only used for the random and exhaustive sequences).

hi, starting_phase is not set if you start a sequence manually via someseq.start(). but you are free to add the assignment to starting_phase there as well... this might help but gets complicated in case of sequences spawning over phases or multiple encapsulated .start()-ed sequences. // Variable: starting_phase // // If non-null, specifies the phase in which this sequence was started. // The ~starting_phase~ is set automatically when this sequence is // started as the default sequence. See // <uvm_sequencer_base::start_phase_sequence>. actually the issue goes deeper, a component is executing a set! of phases at the same time (simple example run+post_main). therefore if a sequence is started at some point in time it is upto the end user to specify which phase was starting the sequence. there was a discussion in the TSC about that topic as you saw but a proper solution was defered to a later release. /uwe