shreyasraju Posted March 7, 2014 Report Share Posted March 7, 2014 Hi, I wanted to use the field.mirror() task provided in the uvm_reg_field class to check only a particular field. However, I see that the field.mirror() task is just calling the parent register mirror task. Hence the entire register is read and compared which I didn't intend to do. I tried this in my sequence and I see the above mentioned behavior. This looks like a serious bug. Can you please confirm this. Regards, Shreyas Quote Link to comment Share on other sites More sharing options...
lisakb1963 Posted March 7, 2014 Report Share Posted March 7, 2014 It depends on how your code was built. You can check the set_compare policy for a field by checking it: bit model.blk.reg.get_compare() 1. If it is set UVM_COMPARE, this will override the UVM_CHECK provided to the mirror. 2. The mirror() call will always use the register/field off of the default_map provided by context when you make the mirror call. 3. You can change your compare policy on the field right before you make the mirror call and see if that makes any difference. model.blk.reg.fld.set_compare(UVM_NO_COMPARE); // now that field should not be compared on mirror mirror(); //arguments to mirror will be different on R/W or check Quote Link to comment Share on other sites More sharing options...
uwes Posted March 7, 2014 Report Share Posted March 7, 2014 hi, im not clear what the issue is? 1. when you invoke mirror on a field - then yes the whole register is accessed UNLESS your bus supports a read of the field slice only. there is just no other way 2. is it the issue that the whole register is reg and there is a compare mismatch in other fields of the reg which you didnt want to compare? if that is the case you should disable the compare using UVM_NO_COMPARE ? something different ? //uwe Quote Link to comment Share on other sites More sharing options...
David Black Posted March 7, 2014 Report Share Posted March 7, 2014 If you are just trying to see if the desired matches the actual, you should use peek() to do a back door access and then compare the value with the results of a get(). There is no significant advantage of having mirror() do the check, and as you observed, mirror() does a front door access of the entire register. That is the purpose of mirror() generally. You might also be able tell mirror to do a back door access by specifying .path(UVM_BACKDOOR) I think, but I have not tried this. Quote Link to comment Share on other sites More sharing options...
shreyasraju Posted March 8, 2014 Author Report Share Posted March 8, 2014 Hi uwes, The issue is, I call field.mirror(UVM_CHECK). This should ideally read the field and check only that field with the mirror register field. However, the field.mirror() task is now comparing the entire register with the mirror which I don't want to do. Can you give me a solution to overcome this? Shreyas Quote Link to comment Share on other sites More sharing options...
shreyasraju Posted March 8, 2014 Author Report Share Posted March 8, 2014 Hi David, I'm not comparing the desired value. I'm comparing the read back value with the mirror value. The read back and compare is done in the mirror task which is convenient to use. Otherwise I will have to read the register and compare only the field bits, which will require some code to be written. Regards, Shreyas Quote Link to comment Share on other sites More sharing options...
yuvraj Posted March 2, 2021 Report Share Posted March 2, 2021 I am facing the issue, as am seeing the read data is coming correctly at BUS and same read data is coming at uvm_reg.svh also. But when am initiating the mirror task and read the same register, am getting an mis-match with DUT and mirrored value. Can anyone help me on this! Quote Link to comment Share on other sites More sharing options...
Mark Strickland Posted March 2, 2021 Report Share Posted March 2, 2021 Is it the case that you see the message "Register __ value read from DUT (__) does not match mirrored value (__) (valid bit mask = __)" and the value shown for "read from DUT" matches your expectations but the value for "mirrored value" does not? In that case, the first step is to make sure you have a uvm_reg_predictor that is working correctly. Quote Link to comment Share on other sites More sharing options...
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