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Difference between Axi and TLM2.0

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There is not a better than the other scenario. The question that must be asked is:

What are you wanting to do with your model?

1. Virtual platform for early software development? Base protocol is likely sufficient.

2. Timing analysis of a chip architecture using Arm interconnect? Then you need a custom protocol for AXI or whatever bus technology is planned. 

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Just to add to Davids answer: TLM or Transaction Level Model is as the name suggest a way to model bus transactions. In using this the abstraction level is raised and a bus access is described as either a blocking transaction which is atomic in the view of the initiator or as non-blocking transaction having a request/response phase in the base protocol. The first is usually used together with direct memory accesses (DMI) in models which are supposed to run fast (e.g. VPs to develop SW). The latter are used to describe timing properties more accurately. The base protocol being part of the SystemC reference implemention can be used for this of the bus transactions are fairly simple (e.g. APB). More advanced protocols liek AXI, OBI, or CHI need a more elaborate protocol implementation. For AXI you might find one at https://github.com/arteris-IP/tlm2-interfaces/ having a documentation at  https://github.com/Arteris-IP/tlm2-interfaces/blob/master/doc/axitlm/axi_tlm2_spec.pdf. Examples of use can be found at https://github.com/Minres/SystemC-Components/tree/develop/examples

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