iff usage (as a mechanism for waiting)

[ljepson74]

I happened across the following code. 

  @(m_vif.smp_cb iff (m_vif.smp_cb.xyz_enable) );

To get to the crux of my question, let's consider it to be the below code.  I don't think I've dropped anything relevant with this change (but I post both, b/c I have dropped important info with my edits in the past).

@(posedge clk iff (xyz_enable) );

Q) How should the above line behave?  How would you read that line aloud?

1) "Wait for a posedge of clk, if and only if xyz_enable is true."   //That's how I read it, but that is incorrect.

2) "Wait for posedges of clk until xyz_enable is true."                  //This is correct.

 

My thought was that when xyz_enable==0, it would just 'fall through' and there would be no wait for a posedge of clk.  i.e.  if(xyz_enable) @(posedge clk);

 

Can someone help me read that line as a descriptive sentence?

 

Here is some test code:

module top;
   logic clk;
   int   count=0;

   initial
      clk=0;
   always
     #1 clk = ~clk;

   initial begin
      $display($time," ************* START");
      repeat (10) @(posedge clk);

      fork
         begin
            repeat(33) begin
               $display($time," Tine1:       waiting for posedge clk. count=%0d",count);
               @(posedge clk);
               count++;
            end
         end
         begin
            $display($time,"       Tine2: waiting for count=10");
            @(posedge clk iff (count==10));
            $display($time,"       Tine2: waited for count=10.  count=%0d",count);
         end
      join_any

      $display($time," ************* END");
      $finish;
   end
endmodule

 

Results:

                   0 ************* START
                  19 Tine1:       waiting for posedge clk. count=0
                  19       Tine2: waiting for count=10
                  21 Tine1:       waiting for posedge clk. count=1
                  23 Tine1:       waiting for posedge clk. count=2
                  25 Tine1:       waiting for posedge clk. count=3
                  27 Tine1:       waiting for posedge clk. count=4
                  29 Tine1:       waiting for posedge clk. count=5
                  31 Tine1:       waiting for posedge clk. count=6
                  33 Tine1:       waiting for posedge clk. count=7
                  35 Tine1:       waiting for posedge clk. count=8
                  37 Tine1:       waiting for posedge clk. count=9
                  39 Tine1:       waiting for posedge clk. count=10
                  39       Tine2: waited for count=10.  count=10
                  39 ************* END

 

Thanks, for any feedback.

 

 

 

[ljepson74]

I found that even if the condition is true from the start, as it is here...

int   count=10;
...
@(posedge clk iff (count>=10));

a single posedge clk will be waited for.

[dave_59]

The iff clause is an edge qualifier. It means wait for the edge to happen if and only if both the edge happens AND the expression is true.

@(event iff (expression));

is equivalent to

do @event; while (!expression)

This becomes very handy when using clocking blocks. Once you start using clocking blocks, you want to make sure all your code that references the clocking block signals are synchronized with the clocking block event and no other events controls or wait statements. This eliminates all chances of race conditions that might add or miss a clocking block cycle.

[ljepson74]

Thanks a lot, Dave.

 

Aside: For non-English speakers, my above usage of the word "tine" (a prong or sharp point, such as that on a fork) was an attempt at some fork humor.