SeanChou Posted July 25, 2011 Report Share Posted July 25, 2011 Hi Cadence Exports, This issue does not related to UVM directly, however, still hope I can get some answer. My problem is the following function coverage does not work (collected) when using without `define FIX. 1. it works with `define FIX, why? 2. it works when using Synopsys/VCS. class abc; bit b; event e; covergroup cov @ e; cov_b: coverpoint b; endgroup: cov function new(); cov = new(); endfunction: new endclass modult top; abc a0; initail begin a0 = new(); `ifdef FIX #0 `endif a0.i = 1; -> a0.e; `ifdef FIX #0 `endif a0 = null; end endmodule Quote Link to comment Share on other sites More sharing options...
jadec Posted July 25, 2011 Report Share Posted July 25, 2011 Without the fix you've introduced a Verilog race condition (sampling trigger and subsequent sequential code could run in either order. I'd recommend you use the sample() function instead: initial begin a0 = new(); a0.b = 1; //-> a0.e; a0.cov.sample(); a0 = null; end Quote Link to comment Share on other sites More sharing options...
SeanChou Posted July 25, 2011 Author Report Share Posted July 25, 2011 Jadec, Thanks, this workaround works with the *W ECSSDM in ncvlog. however, I could not adopt this becuase it causes vcs compiling error. Error-[sNACGWC] Illegal sample call for coverage. Covergroup having sampling event is not allowed to be sampled using the predefined task 'sample'. Quote Link to comment Share on other sites More sharing options...
dave_59 Posted July 26, 2011 Report Share Posted July 26, 2011 Error-[sNACGWC] Illegal sample call for coverage. Covergroup having sampling event is not allowed to be sampled using the predefined task 'sample'.There is no such restriction in the LRM. Quote Link to comment Share on other sites More sharing options...
adielkhan Posted July 26, 2011 Report Share Posted July 26, 2011 If you are going to use sample() then dont use @e as its more racy coding. You might end up with unexpected results as the covergroup would be sampled when @e triggered and when .sample() was called. The following should give you what you want and work well with all your tools. class abc; bit b; event e; covergroup cov; option.per_instance=1; cov_b: coverpoint b; endgroup: cov function new(); cov = new(); endfunction: new endclass module top; abc a0; initial begin a0 = new(); a0.b = 1; a0.cov.sample(); a0 = null; end endmodule -adiel. Quote Link to comment Share on other sites More sharing options...
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