rahulkumarkhokher Posted May 12, 2015 Report Posted May 12, 2015 Hi All, Simple systemverilog TB execute in re-active region because of program block, But in what region UVM tb executes as we do not use program block in UVM TB ? Thanks,Rahul Kumar Quote
David Black Posted May 12, 2015 Report Posted May 12, 2015 Normal SV active regions. If you use clocking blocks for signal interface (and refrain from input delay of 0ns), you will not have any problems w.r.t. races. Quote
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