manikanta.mashetti Posted April 11, 2014 Report Share Posted April 11, 2014 Can we see the schematic view of the designs in Cadence Simvision? Language used for design is SystemC. Quote Link to comment Share on other sites More sharing options...
Roman Popov Posted April 22, 2014 Report Share Posted April 22, 2014 Yes, you can use schematic tracer in Simvision to view interconnect of SystemC design. If you want full RTL schematic view, you will need SystemC synthesis tool like Cadence C-to-Silicon compiler. Quote Link to comment Share on other sites More sharing options...
carter Posted April 22, 2014 Report Share Posted April 22, 2014 Yes, you can use schematic tracer in Simvision to view interconnect of SystemC design. If you want full RTL schematic view, you will need SystemC synthesis tool like Cadence C-to-Silicon compiler. Is there any way in osci? Quote Link to comment Share on other sites More sharing options...
enchanter Posted April 23, 2014 Report Share Posted April 23, 2014 I don't think OSCI gets synthesis feature to translate SystemC code to any level of schematic. Quote Link to comment Share on other sites More sharing options...
David Black Posted April 28, 2014 Report Share Posted April 28, 2014 If you are interested in getting a SystemC netlist (non-graphical) with module hierarchy, then yes the Accellera PoC simulator supports that. I have written a simple netlister several times. Quote Link to comment Share on other sites More sharing options...
Philipp A Hartmann Posted April 28, 2014 Report Share Posted April 28, 2014 If you are interested in getting a SystemC netlist (non-graphical) with module hierarchy, then yes the Accellera PoC simulator supports that. I have written a simple netlister several times. And one should add that generating a DOT file along the way instead of merely printing the hierarchy is not significantly more complex. Quote Link to comment Share on other sites More sharing options...
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