kansagaratushar Posted September 12, 2013 Report Share Posted September 12, 2013 class my_transaction extends uvm_sequence_item; .... int a; int b; int c; .... endclass class my_sequence extends uvm_sequence#(..) .... my_transaction tx; ... `uvm_do_with(tx,{tx.a==1;tx.b==1;tx.c==1;}) .... endclass class my_complex sequence extends uvm_sequence#(...) my_sequence seq; .. .. `uvm_do_with(seq,{seq.a==0;seq.b==0;seq.c==0;}) // This Doesn't work........How can I change value of a,b,c in this situation? Quote Link to comment Share on other sites More sharing options...
anming Posted September 12, 2013 Report Share Posted September 12, 2013 do you think below works for you? my_seq extends uvm_seq; ..... rand int a; .... `uvm_do_with(tx, { tx.a = local:a, ......} ; endclass class my_complex_seq extends uvm_sequence... ...... my_seq seq; `uvm_do_with ( seq, { seq.a == 0 ......} ...... endclass Quote Link to comment Share on other sites More sharing options...
dave_59 Posted September 13, 2013 Report Share Posted September 13, 2013 kansagaratushar, This is one of the reasons I don't recommend using the with clause of randomize(); it goes against OOP programming practices. It would be much easier in the long run to extend my_transaction to add or override the constraints you want, and then use the factory select the transaction you want. See https://verificationacademy.com/cookbook/sequences/overrides for examples of how to use the sequence with the factory. Quote Link to comment Share on other sites More sharing options...
dudi Posted September 29, 2013 Report Share Posted September 29, 2013 Factory override of instances such as transactions (not an issue in type overrides) can cause a severe performance degradation so be careful. The DPI regular expression is very expensive... I would recommend you to think of a different approach, such as using the config_db to set an object wrapper of the new transaction and get it from the sequence only once. Or you can set various parameters using the config_db into the sequence from the test, that control your constraints. Quote Link to comment Share on other sites More sharing options...
manuj216 Posted January 16, 2014 Report Share Posted January 16, 2014 Hi, My problem is also a bit similar, i am still not able to figure out what to do from this discussion i have written this class a extends uvm_sequence; task body(); `uvm_do_with(req, {sig1 >0; sig1 <15;} ) endtask endclass class b extends uvm_sequence; a A; task body(); `uvm_do_with(A, {A.sig1 == 1 }) endtask endclass It gives me error in randomization, but writing the following goes through, why is it so. class b extends uvm_sequence; a A; task body(); `uvm_do(A); endtask endclass Quote Link to comment Share on other sites More sharing options...
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