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$system() function return value OR Setting a random sim seed within SystemVerilog code using wallclock time.


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Does $system() really return an int when called as a function?  (Perhaps no one has implemented this part of the LRM?)

int    myseed;
myseed = $system("date"); //should output "return value of the call to system() with data type int"

quote source: IEEE_Std1800-2017  Section 20.18.1 $system

Quote

$system makes a call to the C function system(). The C function executes the argument passed to it as if the argument was executed from the terminal. $system can be called as either a task or a function. When called as a function, it returns the return value of the call to system() with data type int.

I have not been able to get a non-0 return value, as far as I can tell.  Am I doing something incorretly or is this not implemented? 

What if $system("date") is called?   I suppose the "date" system output is longer than 32b, so perhaps the lowest bits are all 0s and the upper ones that contain the date are truncated.  ?

Some sample code: https://edaplayground.com/x/4dw6 

====================================================================

Ultimate Objective: Use $system("date") to set the seed using $srandom().
Reason: I haven't easily found the simulator run switches for the different simulators to use random seeds for each run.  So, I try to make universal SystemVerilog code (just for use on edaplayground with small examples), to use a random seed for each run, based on the wall clock time.
 

//Compiler / simulator run switches to set random seed in SystemVerilog simulators
Aldec Riviera:    ? ? ?
Cadence Xcelium:  -seed random
Mentor Questa:    -svseed=random
Synopsys VCS:     ? ? ?

(I feel comfortable posting this, as I don't consider this any form of benchmarking between simulators, but just equating compile options.)

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Even if you do get $system to return 0, using date to choose a random seed has problems as was discussed in Doulos' Doug Smith's excellent white-paper on Random Stability <https://www.doulos.com/media/1293/snug2013_sv_random_stability_paper.pdf>.

You would be much better using the TRNG (Truly Random Number Generator) found on most modern processors, and accessible in most OS's including Linux. Better yet, you can use the random_device from the C++11 <random> library as described here: https://www.cplusplus.com/reference/random/random_device/entropy/.

Here's some sample code to illustrate: https://edaplayground.com/x/5AW4

You should be able to easily use this with DPI.

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Thanks a lot, David.
My objective here is simply to be able to push "Run" on edaplayground a few times (usually <5), and to see different results.
On Questa, I can use "-svseed=random".  I don't know the settings for all of the simulators, so tried an experiment to generate random seeds 100% from within SystemVerilog, as I wrote above (rather than using compiler/simulator switches).   For my purposes, if the randomess is not very good ... I don't care.  The quality of the randomness is not my objective here.  Thanks for that detailed reply, however.  You and Doug are great teachers.  I've been in very helpful Doulos classes with both of you.

I'll minimize my questions to these:

1) Can anyone get SystemVerilog's $system() function to return anything besides 0?  I have not been able to.  Is it not implemented or am I doing something incorrectly?
2) What switches will provide random seeds for Aldec Riviera and Synopsys VCS?

 

 

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I guess the return value reflects either successful (zero) or non-successful (non-zero). E.g. the following code prints a non-zero value (in my case, 256 although I would have expected 1):
 

module foo;

  int val;

  initial begin
    val = $system("test -f thisfileprobablydoesnotexist");
    $display(val);
  end

endmodule

 

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6 hours ago, basarts said:

I guess the return value reflects either successful (zero) or non-successful (non-zero). E.g. the following code prints a non-zero value (in my case, 256 although I would have expected 1):
 


module foo;

  int val;

  initial begin
    val = $system("test -f thisfileprobablydoesnotexist");
    $display(val);
  end

endmodule

 

So you could write a program that returns a random number as exit code, but that limits you to 0-255 🙂

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basarts,  Good point.   I had looked into “expr” and some other commands besides date, but should have been looking at exit codes.  (I must have been looking at various SV procedures that can be called as either tasks or functions, for too long.)  It seems any solution for my original question would require some external, non-SystemVerilog code and a DPI or similar call, which I’ll avoid for my current study purposes on edaplayground.  Thanks.

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I can get non-zero values. <https://www.edaplayground.com/x/Zve>

If you had read Doug Smith's paper, you would have found the solution, which I put in the above link. Run multiple times and you get multiple seeds.

Note: You need to be aware how random seeds are established in SystemVerilog to get this to work properly. So move that function into a package and call it from whatever processes you desire.

 

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  • 2 weeks later...

Thanks, David.
Your response got me reading about the quality of RNGs (which was nice, but not my goal) and your initial example was in C.
I was just looking for a way to make a simple system call (from SystemVerilog) to set the seed; to run a handful of times in succession with different seeds.

I didn’t read far enough into Doug’s paper**1 to see his example code that you used in your most recent example.

% head -4 /dev/urandom | od -N 4 -D -A n | awk '{print $1}'

Your second example, www.edaplayground.com/x/Zve, is what I was looking for.  Thank you.  I use it as you suggested, and now can set the seed without needing to know the simulator options to use a random seed.

**1 https://www.doulos.com/media/1293/snug2013_sv_random_stability_paper.pdf

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