TLM Modelling components

[iamgame]

Hi Folks,

Are there good open source libraries out there to model (AT/FT style) SoC components (memories, buses, simple nocs, dma engines, registers which can be decoded off of APB) ? Upon some searching I came across -

1. scml/scml2 - https://gitlab.larc-nthu.net/rgly/scml/-/tree/6cb6356704245b9c17f816ba957f1a0971d76a67  (does not offer bus components)

2. System C components - https://github.com/Minres/SystemC-Components (offers bus components - but the buses do not seem to have non block transfer interface)

3. VCML - https://github.com/janweinstock/vcml (offers bus components - but the buses do not seem to have non block transfer interface)

Any recommendations ? I am particularly interested in bus models (ring architecture, simple noc and bus with protocols like OCP, APB) and registers which are addressed over APB bus.

Thanks.

[Eyck]

SCML is not open-source and if you look at section 1 of the LICENSE file the folks already violate the license by providing the source code. So you are left with 2 options...

For simple busses you can go with the TLM2.0 base protocol which works fairly well. SCC supports non-blocking accesses at the registers and memories so you are left to get or write some interconnect component. AFAIK there are no bus implementations available as open-source to be used out of the box.

But you are invited to contribute e.g. to the SCC (you may contact me directly via github).

[iamgame]

Hi Eyck,

Thanks for your replay and help. Will reach out.

Thanks.