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Covergroup instance issue - system verilog coverage

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I am trying to take instance of covergroup but unable to take it. Getting compilation instance.

class model extends uvm_component;


bit [2:0] state;

 covergroup cg_fsm_state;

  c1 : coverpoint state;


cg_fsm_state cg_fsm_state_inst;

function new();

cg_fsm_state_inst = new();




Using above code, getting compilation error as mentioned below 

Error-[SE] Syntax error
  Following verilog source has syntax error :
      token 'cg_fsm_state' should be a valid type. Please declare it
  virtual if it is an Interface.
  208: token is ';'
    cg_fsm_state  cg_fsm_state_inst;
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