Khushi Posted July 11, 2019 Report Posted July 11, 2019 Hello In the following code, how I can make sure that slave thread get its turn after master so that slave gets the correct value. The below code output 0 instead of 0x11223344. In general how to make sure that the threads are executed in a specific order once a pos edge is detected. For example if we have 10 threads all are sensitive to posedge of the clock. How to make sure the threads are always executed in order 1,2,3,4,5,6,7,8,9,10 so that the behavior is deterministic. #include <iostream> #include "systemc.h" class master : public sc_module { public: sc_in<bool> clk; sc_out<uint32_t> data_out; master(sc_module_name name):clk("clk"),data_out("data_out"){ SC_HAS_PROCESS(master); SC_THREAD(run); } void run(){ wait(clk.posedge_event()); data_out.write(0x11223344); } ~master(){ } }; class slave : public sc_module { public: sc_in<bool> clk; sc_in<uint32_t> data_in; slave(sc_module_name name):clk("clk"),data_in("data_in"){ SC_HAS_PROCESS(slave); SC_THREAD(run); } void run(){ wait(clk.posedge_event()); cout<<hex<<data_in.read()<<endl; } ~slave(){ } }; class top : public sc_module{ public: master m; slave s; sc_clock clk; sc_signal<bool> valid; sc_signal<uint32_t> data; top(sc_module_name name):m("m"),s("s"),clk("clk",sc_time(5,SC_NS)),data("data"){ m.clk(clk); s.clk(clk); m.data_out(data); s.data_in(data); } ~top(){ } }; Thanks Khushi Quote
DS1701 Posted July 12, 2019 Report Posted July 12, 2019 Master and Slave use same clock, so I think Slave need only care data_in. class slave : public sc_module { public: sc_in<bool> clk; sc_in<uint32_t> data_in; slave(sc_module_name name):clk("clk"),data_in("data_in"){ SC_HAS_PROCESS(slave); SC_METHOD(run); dont_initialize(); sensitive << data_in; } void run(){ cout<<hex<<data_in.read()<<endl; } ~slave(){ } }; or class slave : public sc_module { public: sc_in<bool> clk; sc_in<uint32_t> data_in; slave(sc_module_name name):clk("clk"),data_in("data_in"){ SC_HAS_PROCESS(slave); SC_THREAD(run); dont_initialize(); sensitive << data_in; } void run(){ cout<<hex<<data_in.read()<<endl; } ~slave(){ } }; Quote
Roman Popov Posted July 12, 2019 Report Posted July 12, 2019 Quote In the following code, how I can make sure that slave thread get its turn after master so that slave gets the correct value. The below code output 0 instead of 0x11223344. Independently on thread evaluation order code will output 0x0. Because signal values are updated during "Update phase" of simulation. Check Section "4. Elaboration and simulation semantics" of SystemC standard. Quote
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