cliffc Posted December 1, 2015 Report Share Posted December 1, 2015 Using VCS, I can compile and run multiple top-level modules. In the example I am running, I have a dut module and a bind-file module. The bind-file module is nothing more than: module bindfiles; bind dut pLib_dut p1 (.*); endmodule When I compile and run, I indeed see both top modules have been compiled: Top Level Modules: bindfiles dut And both run just fine as expected. Now the question: If I compile both top modules, can I run simv with just the dut module and ignore the bindfiles module? I would like to simulate both with the bindfiles and without the bindfiles module if possible without re-ocmpiling. Thanks - Cliff Cummings Sunburst Design, Inc. Quote Link to comment Share on other sites More sharing options...
sri.cvcblr Posted January 7, 2016 Report Share Posted January 7, 2016 Hi Cliff, VCS provides a -top option for this, however it is a compile-time as far as I remember. Give it a try and see if that helps. Regards Srini www.verifworks.com zxvc 1 Quote Link to comment Share on other sites More sharing options...
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