About sequence problem

[6174841226]

Hi,

I am a UVM initiator and I set up a test bench using UVM.

In this test bench there is one sequence and one sequencer called "aux_inst_seq" and "aux_inst_sqr"

I register the aux_inst_seq with uvm_sequence_utils. I register aux_inst_sqr with uvm_sequencer_utils.

I also set aux_inst_seq as default sequence in uvm_test at building phase with uvm_config_db.

In order to test that aux_inst_seq is called, I add uvm_info to pre_body and post_body of aux_inst_seq

Now these log has not been printed out which shows that the sequence function fails

BTW,

1. I checked the connect in agent and I think it is all right?

2. Does this problem has something to do with raise/drop_objection?

3. How to know uvm_config_db is all right?

4. I'm using UVM_1.1 version

How can I debug this problem?

Thank you!

Edited September 5, 2011 by 6174841226

[sv_champ]

this problem is related to raise/drop_objection. Check the any UVM example on raise/drop objection usage

[kiranbhaskar]

Also add an uvm info in the body task and see if the message is printed.

if the message is still not not printed check your configuration again.

Also see your class hierarchy after running the simulator..and check if the sequencer driver and other things are created correctly.

Regards,

Kiran Bhaskar

Hi,

I am a UVM initiator and I set up a test bench using UVM.

In this test bench there is one sequence and one sequencer called "aux_inst_seq" and "aux_inst_sqr"

I register the aux_inst_seq with uvm_sequence_utils. I register aux_inst_sqr with uvm_sequencer_utils.

I also set aux_inst_seq as default sequence in uvm_test at building phase with uvm_config_db.

In order to test that aux_inst_seq is called, I add uvm_info to pre_body and post_body of aux_inst_seq

Now these log has not been printed out which shows that the sequence function fails

BTW,

1. I checked the connect in agent and I think it is all right?

2. Does this problem has something to do with raise/drop_objection?

3. How to know uvm_config_db is all right?

4. I'm using UVM_1.1 version

How can I debug this problem?

Thank you!

[6174841226]

this problem is related to raise/drop_objection. Check the any UVM example on raise/drop objection usage

I use these functions like this

In uvm_test

virtual task run_phase(uvm_phase phase);
    super.run_phase(phase);

    phase.raise_objection(this);
    `uvm_info(get_type_name(),"I'm in dprx_test run before delay", UVM_LOW)
    #1000000
    print_config();
    `uvm_info(get_type_name(),"I'm in dprx_test run after delay", UVM_LOW)
    phase.drop_objection(this);
endtask:run_phase

In uvm_sequence:

virtual task pre_body();
//    p_sequencer.get(x_aux_inst);
    if (starting_phase != null)
       starting_phase.raise_objection(this,"user_seq not finished");
    `uvm_info(get_type_name(),"I'm in seq pre_body", UVM_LOW)
endtask: pre_body

virtual task body();
    uvm_test_done.raise_objection(this);
    x_aux_inst = new("x_aux_inst");
    x_aux_inst.data_len = 1;
    x_aux_inst.command = 4'b10_00;
    `uvm_do(x_aux_inst)
    uvm_test_done.drop_objection(this);
    `uvm_info(get_type_name(),"I'm in seq body", UVM_LOW)
endtask

virtual task post_body();
    if (starting_phase != null)
       starting_phase.drop_objection(this,"user_seq finished");
endtask

Is there any problems here?

Edited September 5, 2011 by 6174841226

[uwes]

hi,

a few things:

1. you use the new phasing (_phase) BUT then you should object the end of the phase and not uvm_test_done.

2. your objection raise/drop should be in pre/post body only. you dont need the one in the body()

3. it is unclear how you set the default_sequence? as there are a couple of ways (and http://eda.org/svdb/view.php?id=3741)

in the meantime you can increase verbosity, trace the phasing, trace the objections etc to see how your env is behaving.

[6174841226]

hi,

a few things:

1. you use the new phasing (_phase) BUT then you should object the end of the phase and not uvm_test_done.

2. your objection raise/drop should be in pre/post body only. you dont need the one in the body()

3. it is unclear how you set the default_sequence? as there are a couple of ways (and http://eda.org/svdb/view.php?id=3741)

in the meantime you can increase verbosity, trace the phasing, trace the objections etc to see how your env is behaving.

Thank you uwes!

But I still got problems.

1. You said "you use the new phasing (_phase) BUT then you should object the end of the phase and not uvm_test_done"

I think your meaning is

use this code

    class test extends uvm_test;
    ...
    task main_phase(uvm_phase phase);
          phase.raise_objection(this);
          phase.drop_objection(this);
    endtask
    endclass

Do not use this one

in pre_body: uvm_test_done.raise_objection();

in post_body: uvm_test_done.drop_objection();

Is that correct? Or, would you please give me some code examples?

2. I just want to know how driver and sequence interoperate

<1> once the driver call get_next_item, the body() in sequence will be called

<2> body() can only be called one time. It generate many items and put them is a 'fifo'.

get_next_item get item from fifo

Which one is correct? My experiment seems to show that <2> is correct. Do you agree with it?

Thank!

[uwes]

hi,

1. if you raise/drop in pre/post body you dont need another raise/drop in the body itself

2. a single standing objection is good enough to stop the phasing from progression

3. you only need raise/drop on the _phase methods if you are not using method #1

4. you should NOT use uvm_test_done as objection to object to, use rather the starting_phase of the sequence in pre_body/post_body

regarding #2

- the get_next_item doesnt call the body() method

- the uvm_do,uvm_send macros/function basically put a sequence item into the queue and wait until it is completed with a handshake.

- at get_next_item() the item is pulled out of the queue (and randomized), then it is delivered to the driver (the body method is blocked in the uvm_do call)

- if the queue is empty get_next_item blocks

- you must always complete the handshake (get_next_item -> item_done) otherwise you will get an error

- you must not call body() yourself - this task is invoked by the sequencer

- the uvm_do/uvm_send simply stall the body task until the lower level has completed

/uwe