Dynamic module instance creation

[NickIlieskou]

Hello everyone, 

 

I have a folder with many modules. I want to create a configuration file specifying which of those modules to use in my simulation. In the sc_main.cpp, before the simulation starts I would like to open my configuration file, read which modules I would like to open and then create instances, connect their ports etc

 

The configuration file contains all the necessary information as number of ports, type of each port , name of the module, name of the file etc. 

I can easily create the signals I need but I don't know how I can create the module instance. 

 

example of configuration file 

....

ex_name_module 

porta ; input ; double

portb ; output ; double 

......

In the sc_main I will read the file. I will create 2 signals of type double. But then i should do something like 

ex_name_module EX_NAME_MODULE("EX_NAME_MODULE");

EX_NAME_MODULE.input(sig1);

EX_NAME_MODULE.output(sig2);

 

One idea that I tried but it didn't work, was to create a .cpp file for each module. This file has a function containing the instance creation of the respective module. The arguments of the function were the signals created in sc_main.

 

So any ideas of how I can create such an instance? Thank you in advance

[dakupoto]

Hello everyone, 

 

I have a folder with many modules. I want to create a configuration file specifying which of those modules to use in my simulation. In the sc_main.cpp, before the simulation starts I would like to open my configuration file, read which modules I would like to open and then create instances, connect their ports etc

 

The configuration file contains all the necessary information as number of ports, type of each port , name of the module, name of the file etc. 

I can easily create the signals I need but I don't know how I can create the module instance. 

 

example of configuration file 

....

ex_name_module 

porta ; input ; double

portb ; output ; double 

......

In the sc_main I will read the file. I will create 2 signals of type double. But then i should do something like 

ex_name_module EX_NAME_MODULE("EX_NAME_MODULE");

EX_NAME_MODULE.input(sig1);

EX_NAME_MODULE.output(sig2);

 

One idea that I tried but it didn't work, was to create a .cpp file for each module. This file has a function containing the instance creation of the respective module. The arguments of the function were the signals created in sc_main.

 

So any ideas of how I can create such an instance? Thank you in advance

Hello Sir,

I would wait for the gurus on this forum to address your query

in detail, but rigt off, it appears to be a difficult goal to achieve.

First of all, please keep in mind the physical picture -- would it

be possible, in a real system with real integrated circuits, to

achieve your goal ? That is, how would it be possible, for

example to not use 2 out of 4 input ports of a microcontroller,

and then later use the previously unused ports, WITHOUT

making too many significant changes ? In my humble opinion,

that is not an easy task. In software, one can do a lot of things

that have no bearing/relationship with the real world. Hope that

helps.

[David Black]

Because SystemC is based on C++ and because the design intentionally chose to ensure that only correct port types are connected to like types at compilation, what you ask is probably not something that would be possible as an executable unless you are willing to give up most of the safety, which I would not recommend. An alternative solution would be create a script that assembles your source code prior to compilation. This could easily be done using something like PERL or Python.

[NickIlieskou]

Thanks both of you for your answers.