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dakupoto last won the day on August 7 2015

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  1. Sir, 'wait-notify' pairs are tricky and work correctly if the programmer has been able to match each notify with the corresponding wait. Also, a few events might get lost. Why not use SC_THREADs with infinite loops in them, that will relieve the programmer from the error-prone task of matching 'waits' and 'notifys' -- the sensitivity list takes care of everything. Hope that helps.
  2. Absolutely. Please note that SystemC is just a C++ library, so that whatever you can do with the parent language, will also work here.
  3. SystemC's predecessor is SpecC, cones with its own compiler and freely downloadable. Syntax is very much like the plain C language without any of the complexities of the C++ language. Why SystemC flourished to become an industry standard, and SpeC remains mostly as an academic tool, is a long story.
  4. Sir, While there is nothing wrong about including ever more advanced C++ language features into SystemC, one has to ponder as to how these new language features would better facilitate the analysis of a given design problem. In particular, one has to examine how and why the Google search engine has maintained its absolute stranglehold, while Yahoo and Bing have fallen by the wayside. All of the Google core modules have been written in plain ANSI C. As it is, C++ is a very complicated language compared to its mother language C, with inheritance, multiple inheritance, function overriding, operator overloading, pure virtual functions and templates. The only feature complicated about C is pointer arithmetic, which is carried over to C++. In addition, C++ adds its own complexity. As an example, consider the fact that a few years ago intel added 400 extra pins to its 2 core processors, raising the total pin count from 755 to 1155. However, from personal experience I know that these 400 extra pins do not in any way improve the performance of any PC, but rather makes motherboard design more complicated/ difficult and error-prone and prototype debugging/testing a major headache. Albert Einstein once said something like 'make it simple but not more simpler', implying that everything should have just the right amount of complexity built in, but no less or more.
  5. Sir, Maybe you should create your own proof-pf-concept implementation that includes all these advanced features that you mention above. You could then sell it commercially. Maybe you should stop responding to your own posts -- justa thought.
  6. Hello Sir, This has nothing to do with sc_signal. It is a question of accessing and writing to specific vector locations. The vector manipulation is always done inside a module, NOT inside a sc_signal or any other signal channel. The sc_signal simply transfers the bit vector from one module to another, nothing else. Adding/removing data bits from the bit vector ocurs exclusively inside a module.
  7. Hello, Please note the following: 1. SystemC is a plain ANSI C++ library 2. The core idea in SystemC is to have computing elements(CEs) send and receive from other CEs via channels. Each CE DOES NOT care how a given input channel sent it data and from which CE. All it knows is that data of a certain type will arrive over e.g., channel A, it will perform some operations on the received data and send it out over e.g., channel B. The sender does not care who the receiver is, and vice versa. This is TLM. Hope this helps.
  8. Hello Sir, Unfortunately there is no equivalent construct in SystemC. Please note that SystemC is basically C++ with artificially imposed concurrency and time features. Verilog was designed right from the start with concurrency and time. Hope that helps.
  9. Hello, I am not sure at all what exactly you mean by "cycle". Please note that the AND operation is a pure combinational logic operation, and has nothing to do with any clock. That is why, when combinational logic circuits are simulated, some values are added to the signal lines, and the simulation is run for fixed time period, independent of the combinational logic circuit -- no clock synchronization is required. Please be very clear about what you are doing or trying to achieve.
  10. Hello, Please change the template to "bool" from "sc_uint". Compile and try. Will work.
  11. Hello, Please provide the error message. In your SC_MOULE declaration/definition for the 'and' gate, have you tried: sc_in< sc_uint<1> > a; sc_in< sc_uint<1> > b; Instead of(as you have rioght now): sc_in< sc_uint<1> > a, b; In your "int sc_main" I am afraid you do not insert any values into your signal lines for the 'and' module to operate on. Finally, please check out some new book on SystemC -- unfortunately the material available on some Web sites is hopelessly outdated, with the authors being too lazy to update them. Hope this helps.
  12. Hello Sir, First of all, what is the benefit of using a complicated data structure as a vector of vectors ? Since any design would involve a fixed number of shift registers(bit vectors anyway), maybe the wisest option would be to have a fixed number of shift registers and manipulate them separately, How would one deal with the case when some data is to be written to, e.g., shift register number 3. With separate shit registers, shift register 3 is identified right away, whereas with a vector of vectors, one has to first locate shift 3 inside the container vector, and then write to it. Secondly, as SystemC is a C++ library, and the STL library does support the vector of vectors data structure -- but initializing and reading/writing data from/to is a messy operation. I personally would not get into that mess, and focus more on solving the design problem at hand. Hope that helps.
  13. Hello, I am very curious to know how a Youtube application can communicate with a host computer that too have a C++/SystemC compiler running on that computer. Any ideas ?
  14. Hello, As the others have noted, there could be problem with the environment variables. Also, if you are starting out with SystemC, please try out a simple example, preferably of your own -- e.g., a 2 input NAND gate. That way, if there are any issues with the environment variables, these can be identified quickly. Hope that helps.
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