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Why is UVM_REG faster than RGM

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  • 1 month later...



We did simple comparison in our TB.


We did following number of writes-Read on a single design register with both UVM_REG and RGM individually.

(Env stays same)

(We could reproduce same result on two separate simulators)

  • 100 loops
  • 1000 loops
  • 10000 loops


Results was the delta between uvm_reg and rgm actual simulation time was increasing.

UVM_REG was much faster compared to RGM for 10,000 loops


And hence we were trying to analyse why we see such a difference.

(Data structure ... etc)


Any further information would be helpful.



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  • 2 weeks later...



there are numerous factors affecting performance here. having looked deeply into both models i doubt that in an apple-to-apple comparison there are major differences for this use model. please provide version info and/or a testcase to check this.



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