We did simple comparison in our TB.
We did following number of writes-Read on a single design register with both UVM_REG and RGM individually.
(Env stays same)
(We could reproduce same result on two separate simulators)
Results was the delta between uvm_reg and rgm actual simulation time was increasing.
UVM_REG was much faster compared to RGM for 10,000 loops
And hence we were trying to analyse why we see such a difference.
(Data structure ... etc)
Any further information would be helpful.