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  1. Hi, We did simple comparison in our TB. We did following number of writes-Read on a single design register with both UVM_REG and RGM individually. (Env stays same) (We could reproduce same result on two separate simulators) 100 loops 1000 loops 10000 loops Results was the delta between uvm_reg and rgm actual simulation time was increasing. UVM_REG was much faster compared to RGM for 10,000 loops And hence we were trying to analyse why we see such a difference. (Data structure ... etc) Any further information would be helpful.
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