[schedule] Does anyone know when would UVM 1.0 offcial be available?

[SeanChou]

Hi all,

List several questsions of mine here, any feedbacks are welcome!

1. As title, such as Q3 (or on DAC)

Janick said there would be OSCI-TLM2 and Reigster package in this official release, is that true?

http://www.vmmcentral.org/vmartialarts/?p=1395

2. OSCI-TLM2:

Current Cadence ML package that support SV/SC TLM but it need to modify SC source. is there chance to be even better? (without modifying existing TLM2 systemc code)

3. Register Package:

do you think its RAL, RGM, or another kind of package between them? (copy a related blog below)

http://www.coolverification.com/2010/05/video-uvm-register-package-survey-results.html

Thank you so much!

[Adam Sherilog]

Hello SeanChou,

Any official roadmaps would be announced by the Accellera VIP TSC chairs Tom Alsop and Hillel Miller (I'm the secretary), but let me see if I can help with your questions based on the public discussions so far.

1. The TSC has not set a firm date yet as we are trying to finalize the content. For sure, a register package and a subset of OSCI-TLM2 are very high on the list. There are several other features on that list as well. I would expect that we will have a more solid release date after the TSC meets face to face later this summer. i will encourage Tom and Hillel to comment here on UVM World when we have more firm information.

2. There is always the chance for improvement! :-) One great thing about this standards group is that the team believes in delivering the best, not the lowest common denominator. I believe that the TLM2 work will include some SystemC support as each member contributes their requirements. In fact, I will make sure that the TSC is aware of your request when we meet today.

3. This one, unfortunately, I can't predict because I am both a chair of the committee and a representative from Cadence. What I can say is something similar to my point in #2. The TSC has worked extremely well to honor the needs of the whole verification community without causing undo backward compatibility issues. JL Gray's survey showed multiple register packages in use so I believe the TSC will follow the same process that brought you UVM 1.0 EA: collect requirements, develop a specification, develop an implementation, validate, and deliver. While that might seem like it would lead to a long project, the level of experience among the users, service providers, and EDA companies in the TSC will surely Accellera-te :-) it.

I hope that helps and I will encourage Tom and Hillel to respond as well.

=Adam "Sherilog" Sherer

[SeanChou]

Thank you so much for the comprehensive answers, the fact you mentioned is exciting and wonderful. copy it below again and look forward the coming of the next or official release.

One great thing about this standards group is that the team believes in delivering the best, not the lowest common denominator

[Tom_Alsop]

The quick answer is the committee doesn't know yet. We want to allow the next release to be feature driven, not date driven. As Adam mentioned we are looking at several features and walking through the requirement lists for those features and building them up by collecting feedback from committee members. We have other features beyond Register Packages and TLM2 that are also being discussed, Phasing enhancements being the other big one. The F2F we are having in early August will give us a good idea of the release date. My gut estimate is Q4 of this year simply because of the amount of work needed to gather the appropriate list of requirements, sanitize them, vote on them, and create a spec that everyone mostly agrees to. All that has to be done before we implement the changes. I'd like to see the requirements list done and solidified by the end of the August, Specs done in Sept, and implementation/testing over the next 2/3 months.

Let me be clear that this is just my personal take and may only amount to a wish. Ask us for an update in early August.

Hope this helps, -Tom

[SeanChou]

I am curious if the current progresses are still as epected below?

10/7 - document

10/30 - 10 release

http://www.uvmworld.org/pdf/VIP-TSC-Roadmap-June-2010.pdf

if not, what would be the correct date of UVM10 document or data release? would it be before the end of this year?

Thanks!

[Adam Sherilog]

Thanks for pinging this thread because I get that question a lot. The TSC is working hard to get the UVM 1.0 released this year. We do have a target of December 22 for a final completion, but we tend to like to release on a Monday so the library may well appear on the Accellera site on December 27. We also now have a program manager assigned to help the whole team work toward that deadline.

Both Cadence and Mentor have been blogging on UVM 1.0 and each have some interesting information about the technical content. Since that work is still in-flight, I won't comment further but suggest you keep checking back here on UVM World for further details.

=Adam Sherer