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TRANG

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TRANG last won the day on December 14 2018

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  1. I'm learning simple socket with 2 examples: ex1: https://www.doulos.com/knowhow/systemc/tlm2/tutorial__3/tlm2_getting_started_3.cpp ex2: in lib : systemc-2.3.3\examples\tlm\common\include\models\SimpleBusLT.h I know that : //Initiator tlm_utils::simple_initiator_socket<Initiator> initiator_socket; ... tlmTrans.set_data_length(emdata_length); tlmTrans.set_data_ptr(emdata_ptr); initiator_socket->b_transport(tlmTrans, localTime); ... //Target tlm_utils::simple_target_socket<Target> target_socket; ... target_socket.register_b_transport(this, &Target::b_transport); ... virtual void b_transport(tlm::tlm_generic_payload& trans, sc_time& delay) { //receive data from tlmTrans Initiator } I only understand "register_b_transport" function. But I see others function , Can you explain it? and how to use? //Initiator initiator_socket.register_invalidate_direct_mem_ptr(this, &Initiator::invalidateDMIPointers); ... //Target target_socket.register_b_transport(this, &Target::initiatorBTransport); target_socket.register_transport_dbg(this, &Target::transportDebug); target_socket.register_get_direct_mem_ptr(this, &Target::getDMIPointer);
  2. TRANG

    simple socket

    Thank for your help @AmeyaVS @Philipp A Hartmann Thanks so much!!!
  3. TRANG

    simple socket

    Thanks @AmeyaVS how to set base name for each initiator_socket? Suppose, I have initiator_socket[4]. I only initialize initiator_socket as bellow code. sc_core::sc_vector< tlm_utils::simple_initiator_socket_tagged<Router > > initiator_socket; ... /// Router::Router():initiator_socket("initiator_socket",4) {} I can't set base name for each initiator_socket as my expected. ex: initiator_socket[0] : " initiator_0_socket" initiator_socket [ 1] : " initiator_1_socket" initiator_socket [ 2] : " initiator_2_socket" initiator_socket [ 3] : " initiator_3_socket"
  4. TRANG

    simple socket

    I change simple_initiator_socket_tagged<Router>* initiator_socket[N_TARGETS]; to: sc_vector< simple_initiator_socket_tagged<Router >* > initiator_socket; but cannot. Error C2825 'T': must be a class or namespace when followed by '::' ..\..\libs\systemc-2.3.2\src\sysc\utils\sc_vector.h 502
  5. TRANG

    simple socket

    Thank @Eyck @David Black ///Constructor for (unsigned int channel = 0 ; channel < NUM_CHANNEL ; channel++) { char socketName[100]; sprintf(socketName,"initiator%d",channel); initiator_socket[channel] = new tlm_utils::simple_initiator_socket_tagged<ModelA>(socketName); } .... I want to use pointer to set name for each inittiator_socket[channel] (as above code I used "socketName" variable) @Eyck Can you show me how to use sc_vector and set name for each inittiator_socket? Thanks all.
  6. Hi all, I want to understand more about simple_initiator_sọket and simple_target_socket. How is it working?? Suppose, "Model A 3 initiator" --> <-- "3 target Model B" Case 1: //Model A tlm_utils::simple_initiator_socket_tagged<ModelA>* initiator_socket[3]; ... // Model B tlm_utils::simple_target_socket_tagged<ModelB>* target_socket[3]; ... //bind for(int i=0;i<3;i++){ objA->initiator_socket[i]->bind(objB->target_socket[i]); } Case 2: //Model A tlm_utils::simple_initiator_socket_tagged<ModelA>* initiator_socket1; tlm_utils::simple_initiator_socket_tagged<ModelA>* initiator_socket2; tlm_utils::simple_initiator_socket_tagged<ModelA>* initiator_socket3; ... // Model B tlm_utils::simple_target_socket_tagged<ModelB>* target_socket1; tlm_utils::simple_target_socket_tagged<ModelB>* target_socket2; tlm_utils::simple_target_socket_tagged<ModelB>* target_socket3; ... //bind objA->initiator_socket1->bind(objB->target_socket2) objA->initiator_socket2->bind(objB->target_socket3) objA->initiator_socket3->bind(objB->target_socket1) Question 1: Is both above code is correct? Question 2: In case 2, I set "bind" between Model A and Model B (unordered declare, initiator_socket1 with target_socket2 ,..... ). Is it right? Thanks all.
  7. TRANG

    Initial value port

    I usually don't use sc_fifo ( only use sc_signal, sc_in, sc_out ). But I don't see any function initialize the value for sc_fifo . Both "write()" and "nb_write()" (sc_fifo) will call to sc_prim_channel::request_update() . So I think , sc_fifo can set value for buffer ( this isn't called initialize the value forbuffer ) Thank you so much!!! @David Black
  8. TRANG

    Initial value port

    Thank @David Black and @Roman Popov Thank you so much!!! But I think that, initialize the value depend on specification model require. Ex: Model A can reset Model B with reset port active with LOW level Then sc_out<bool> resetPort; in the Model A must be set initialize the value for resetPort is 1 on constructor So I think that , Should set initialize the value of port on constructor --> Clearly --> Easy maintain source code / //A.h class A: public sc_module { public: sc_in<bool> clkAPM; sc_out<bool> resetPort; sc_signal<bool> sig; ... ///A.cpp A::A(sc_module_name name) :sc_module(name) // Initializing ,clkAPM("clkAPM") ,resetPort("resetPort") ,sig("sig") {//{{{ /// Initializing resetPort.initialize(true); sig.write(true); SC_METHOD(AMethod); dont_initialize(); sensitive << sig ; ...
  9. TRANG

    Initial value port

    Hi all, sc_in<type> input; sc_out<type> output; sc_signal<type> signal; Do you need set Initial value ( use write(0); ) for output and signal port or it auto set 0 when declare? Thank all.
  10. TRANG

    Process sensitivity with sc_vector

    I think if use pointer, my code faster and save memory . my project: ///APM.h class APM: public sc_module { public: sc_in<bool> clkAPM; sc_in<bool> *IFA[4]; ... ///APM.cpp APM::APM(sc_module_name name) :sc_module(name) // Initializing ,clkAPM("clkAPM") {//{{{ /// Initializing std::ostringstream port_name; for (unsigned int index = 0; index < 4; index++) { port_name.str(""); port_name << "IFA" << index; IFA[index] = new sc_in<bool>(port_name.str().c_str()); sc_assert(IFA[index] != NULL); } SC_METHOD(AMethod); dont_initialize(); sensitive << (*IFA)[0]; ... I know this it old style code. So, I want to use sc_vector. Thanks.
  11. TRANG

    Process sensitivity with sc_vector

    Thanks @Philipp A Hartmann How to use sc_vector with pointer? sc_vector< sc_in< int> > *in_vec;
  12. TRANG

    Array when declare port for model

    @David Black @Roman Popov Thank for your info. I'm using systemc 2.3.2.
  13. TRANG

    Array when declare port for model

    I tried above code ,but it's not working , Can you share me docs about "SC_NAMED" ? Thank @Roman Popov
  14. TRANG

    Array when declare port for model

    Thank you so much @Roman Popov
  15. TRANG

    Array when declare port for model

    @David Black Thank you so much !! I see some projects . They use code as bellow: //exxe.h class EXXE { public: sc_in<sc_dt::uint64> *clock[3]; sc_in<bool> *input[5]; EXXE(); ~EXXE(); } //exxe.cpp ///Constructor EXXE::EXXE() { std::ostringstream name; for (unsigned int index = 0; index < 5; index++) { name.str(""); name << "input" << index; input[index] = new sc_in<bool>(name.str().c_str()); } for (unsigned int index = 0; index < 3; index++) { name.str(""); name << "clock" << index; clock[index] = new sc_in<sc_dt::uint64>(name.str().c_str()); } } But you said that: "None of your three attempted examples appear correct,...." Are they incorrect? Thank @David Black
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