phil Posted November 19, 2012 Report Share Posted November 19, 2012 Hi: UVM_REG provides memory burst access routines, but no register block burst accesses. for some bus protocols, they are different types of transactions between register burst access and a sequence of consecutive single register accesses. If I need to test the burst transactions on a register block, what would be a good approach? I am thinking implementing block busrt access routines by modifing memory burst routines. Thanks. Quote Link to comment Share on other sites More sharing options...
petermonsson Posted December 13, 2012 Report Share Posted December 13, 2012 Hi Phil, I would drop out of the register layer and just run a burst sequence on the bus directly. If the registers are on an AXI bus, then I would run an AXI sequence with burst directly. Best Regards Peter Quote Link to comment Share on other sites More sharing options...
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