iay Posted November 10, 2012 Report Share Posted November 10, 2012 hello, experts, i am new to systemverilog verification , and now i want to know the difference of the two basic concept: UVM and VMM. Thanks! Quote Link to comment Share on other sites More sharing options...
dave_59 Posted November 13, 2012 Report Share Posted November 13, 2012 Suggest you look here https://verificationacademy.com/courses/basic-uvm and here http://www.doulos.com/knowhow/sysverilog/ Quote Link to comment Share on other sites More sharing options...
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