Khushi Posted February 6 Report Share Posted February 6 Hello What is the usage of setting allLogicalDirectionsAllowed to true in ipxact:port/ipxact:wire. The LRM says it allows to map that physical port to a logical port with different direction. If we set allLogicalDirectionsAllowed to true, then isn't it violates the direction semantics of absdef logical port vs component physical port. I am not able to understand the usage scenarion where we actually need allLogicalDirectionsAllowed=true ? Thank you Kushi Quote Link to comment Share on other sites More sharing options...
kock Posted February 7 Report Share Posted February 7 Hello Kushi, As the LRM says, if allLogicalDirectionsAllowed is true then the direction constraints for that port are ignored if it is mapped to a logical port. A scenario is an AMBA clock port for which the direction of logical ports is input. If your IP would have a clock output port, then you can set allLogicalDirectionsAllowed to true for that port and map it to an AMBA logical clock port. Another example is that you map one physical to both a target and an initiator interface on the same IP. Often logical ports in both interfaces have opposite directions and you would need to set allLogicalDirectionsAllowed to true. Best regards, Erwin Quote Link to comment Share on other sites More sharing options...
Khushi Posted February 7 Author Report Share Posted February 7 Thank you Erwin But I am not sure to understand this. For clk and reset(in AMBA) the direction is "in" for both onMaster and onSlave which means (as I understand) both master and slave interfaces are driven by a clock/reset via an external clock/reset driver. So corresponding clk/rst physical port on both master and slave interfaces should be of direction "in". And corresponding physical ports on clock/reset driver should be of direction "out". So I am not sure to understand when you said IP would have clock output port and we want it to map to AMBA bus interface In addition to this, I am not sure to get your following statement "Often logical ports in both interfaces have opposite directions and you would need to set allLogicalDirectionsAllowed to true" As usually in abs defs we have different directions for master and slave(onMaster/direction and onSlave/direction) so do we still need to set allLogicalDirectionsAllowed to true ? Thank you Khushi Quote Link to comment Share on other sites More sharing options...
kock Posted February 12 Report Share Posted February 12 Hello Kushi, Please see the diagram below which shows a subsystem with an AMBA initiator interface that is connected to a NoC with an AMBA target interface. The AMBA clock is generated inside the subsystem using a clock gate that gates the clock source from a clock generation unit. In this case, the clock port in the AMBA interface of the subsystem is an output. Hence it requires allLogicalDirectionsAllowed value true to allow port mapping on the AMBA logical clock port. The second diagram below shows a subsystem that uses a bus interface with two logical ports A and B. They have direction in for onTarget and direction out for onInitiator. The target interface maps a1 to A and b to B. The initiator interface maps a2 to A and b to B. Port b requires allLogicalDirectionsAllowed value true. Hopefully the examples clarify things for you. Best regards, Erwin Quote Link to comment Share on other sites More sharing options...
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