busdef/absdef extends feature

[Khushi]

Hello Guys

I am looking at busdef/absdef extending mechanism and I have following questions. As an example, I have a bus A and bus B where bus B extending from bus A. IP1 using bus A and IP2 using bus B

1. If a new port is added in B, then during the interface connection(IP1/A to IP2/B) how the corresponding port is connected because IP1/A portMap does not have this new port

2. If an exiting port width is changed from 4 to 8 bit (or 8 to 4 bit) from A to B, during the interface connection(IP1/A to IP2/B) how the ports are connected because the port width are different. In this case which subset of port should be  connected (lsb,msb or tool dependent).

=>In this case how the interfaces are still compatible when they are not pin compatible ?

3. LRM says, parameter can be changes in extended interface. Does it include all attributes of a parameter and its default value too? If a parameter default value can be changed, how it will impact the things. 

 3a) When a port width is parameterized on that parameter (similar to case #2 above)

 3b) When a port has isPresent flag on that parameter. For bus A, the default value of this parameter makes this port valid(due to isPresent is false) but for bus B, as the default value is changed  which makes this port disappear(due to isPresent is false). In this case this port is removed in extended interface whereas SCR says if a port is removed, it should be made illegal in extended interface. 

4. In IPXact LRM, section 5.11.3, starts with following text.

Table 1 specifies which elements and attributes may be modified in a bus definition. The Modifiable column should be checked after elaboration

Here What is the meaning of "The Modifiable column should be checked after elaboration"

Thanks

Khushi

[kock]

Hello Kushi,

I noticed your are refering to the IEEE 1685-2014 LRM. Please update to the IEEE 1685-2022 LRM.

To address your questions:

Ad 1) The new port in B will not be connected to a port in A through a bus interface connection. However, there may be a default value described for port B.

Ad 2) The bits of the logical ports are connected on either side of the bus interface connection. If a port width changes from 8 to 4 then logical bits [7:4] are not connected anymore.

The interfaces are compatible because IP-XACT still allows you to create interconnections between the interfaces. Compatible does not imply anything on physical connections.

Ad 3) Like the LRM says you can add, remove, and change any parameter in an extending bus or abstraction definition. I am not sure what you mean with impact. The extending definition is just another definition.
 

Ad 3a) Same answer as for 2. The parameter value defines the width of a logical port.
Ad 3b) An extending abstraction definition is not allowed to remove ports. Only the presence can be set to illegal to indicate that it cannot appear in a port map. An isPresent element that evaluates to false effectively removes a port. So the two mechanisms are different.

Ad 4) It means that all parameter values values have to be applied and all isPresent conditions have to be processed such that you know exactly know the elaborated design hierarchy. For example, if a logical port has an isPresent element, then you need to know the evaluated value for that element in order to know if the logical port is part of the elaborated abstraction type or not. Only then you can check SCR 6.11 (in IEEE 1685-2014).

Best regards,
Erwin