sc_main() function in systemc

[Abdul Razak H S]

Hi,

I'm new to systemc, I wanted to run a verilog design and systemc testbech on Verilator 3.916 2017-11-25  and g++ (Ubuntu 7.5.0-3ubuntu1~18.04) 7.5.0 compiler.

When I run add.v verilog file and sim_main.cpp on verilator with the following command I'm getting error

add.v file

module add(clk);

input clk;

always@(posedge clk)
begin
        $display("hello razak");
        $finish;
end
endmodule

sim_main.cpp file

#include "Vadd.h"

int main(int argc,char** argv,char** env) {
        Verilated::commandArgs(argc,argv);
        sc_clock clk{"clk",10,SC_NS,0.5,3,SC_NS,true};
        Vadd* top = new Vadd("top");
        top->clk(clk);
        while(!Verilated::gotFinish()){
                sc_start(1,SC_NS);
        }
        delete top;
        //exit(0);
        return 0;
}
int sc_main(int argc,char** argv,char** env){
        main(argc,argv,env);
        sc_stop();
}

Commands

RUN.sh file

verilator -Wall --sc --exe sim_main.cpp add.v
make -j -C obj_dir -f Vadd.mk Vadd
obj_dir/Vadd
 

Error

make: Entering directory '/home/razak/systemC/verilator_sim_code/add_2nos/obj_dir'
g++     -L/usr/local/systemc-2.3.3/lib-linux64/ sim_main.o verilated.o Vadd__ALL.a    -o Vadd -lm -lstdc++ -lsystemc 2>&1 | c++filt
/usr/local/systemc-2.3.3/lib-linux64//libsystemc.so: undefined reference to `sc_main'
collect2: error: ld returned 1 exit status
make: Leaving directory '/home/razak/systemC/verilator_sim_code/add_2nos/obj_dir'
./RUN.sh: line 3: obj_dir/Vadd: No such file or directory
 

[David Black]

I was unaware that Verilator had a flow to allow mixed simulations, but more pointedly:

1. main should call sc_main (not the other way around)
   1. Usually we don't write main because SystemC provides it to automatically call sc_main
2. main only has two forms in my experience:
   1. int main( int argc, char* argv[]) // normal
   2. int main() // usually for embedded or simple situations
   3. You really should return a value from main. Either 0 (gives not much information and implies success) or a calculated value resulting in 0 (success) or 1 to 127 (failure)

[Eyck]

You can use the generated SC module in a normal SystemC simulation. The following should work:

#include "Vadd.h"

int sc_main(int argc,char** argv,char** env) {
        Verilated::commandArgs(argc,argv);
        sc_clock clk{"clk",10,SC_NS,0.5,3,SC_NS,true};
        Vadd top("top");
        top.clk(clk);
        while(!Verilated::gotFinish()){
                sc_start(1,SC_NS);
        }
        sc_stop();
        return 0;
}

[Abdul Razak H S]

No Euck it's throwing same error "undefined reference to `sc_main'
collect2: error: ld returned 1 exit status"

[David Black]

Remove the char** env from the sc_main() signature. It's not supported by SystemC (nor in main for that matter). If you are trying to pass the environment variables, then pass them via a global variable or (better) use the library getenv() function.

What toolset (compiler and host OS) are you doing this in?

 

[Abdul Razak H S]

i'm using verilator and g++ compilers on ubuntu OS

[Abdul Razak H S]

Hi David Black,

After removing char** env from sc_main() it's working fine.

Thank You