cnsujeer Posted December 31, 2021 Report Share Posted December 31, 2021 Dear Experts, Are there any recommendations on how to choose global quantum ? Lets say for multicore systems with write back caches ? Quote Link to comment Share on other sites More sharing options...
Eyck Posted December 31, 2021 Report Share Posted December 31, 2021 I guess there aren't general recommendations. It depends on what your scenario is and what you want to analyze. If it is SW bringup without a lot of hardware->software interactions a large quantum is ok. I had casse where the booting of Android with a quantum of 10-100ms (running the system with 500MHz) was ok. On the other hand if you have dense HW/SW interactions then a quantum of 16 cycles may be the limit as other wise the syncronization is gone... cnsujeer 1 Quote Link to comment Share on other sites More sharing options...
cnsujeer Posted December 31, 2021 Author Report Share Posted December 31, 2021 Hi Eyck, Thanks for the details.. some more follow-up questions : From the above statement, my understanding the quantum is more like an option that can be provided to the simulator user who knows the best on what the software is doing/usecase is. Will this be the correct thinking ? For HW/SW interaction case, how the number 16 cycles is arrived at ? Is this a golden number that is being followed or that's an example number from your observations over multiple such use cases ? If the synchronization is broken, how do we know ? what are the general practices followed in such case ? Example : if we have an application mapped to multiple cores sharing some data(could write/read the data). How data integrity can be guaranteed? Are there techniques like dynamic prediction of quantum number.. So that the synchronization point is chosen appropriately even though some generous number was set initially ? Thanks in advance. 🙂 Regards, Chethan Quote Link to comment Share on other sites More sharing options...
David Black Posted December 31, 2021 Report Share Posted December 31, 2021 From a system point of view, you should consider which resources are being shared (specific address ranges). You should detect any shared accesses (read or write), and perform explicit synchronization on any shared access. cnsujeer 1 Quote Link to comment Share on other sites More sharing options...
Eyck Posted January 12, 2022 Report Share Posted January 12, 2022 Quote For HW/SW interaction case, how the number 16 cycles is arrived at ? Is this a golden number that is being followed or that's an example number from your observations over multiple such use cases ? This was for a particular implementation where the SW had closer interaction with the HW. So this is not a golden number rather a limit we for this particular case and derived from a system point of view (as @David Black mentioned). Quote If the synchronization is broken, how do we know ? what are the general practices followed in such case ? Example : if we have an application mapped to multiple cores sharing some data(could write/read the data). How data integrity can be guaranteed? In this particular case it was detected by having assertions in the HW model to detect the case of SW being out of sync with the HW. So the general advise is to express constraints and assumptions as assertions in your models. Quote Are there techniques like dynamic prediction of quantum number.. So that the synchronization point is chosen appropriately even though some generous number was set initially ? I'm not aware of a generic way do dynamically predict the size of the quantum as this depends on the structure and purpose of the model. You might implement a mechanism to detect the phase of SW execution (e.g. initialization, waiting, ...) and adapt the quantum accordingly. The other option is to break the quantum when accessing specific units lik peripherals or alike by calling wait() during that (blocking) access. This way you have a closer sync between the 2 parts. Quote Link to comment Share on other sites More sharing options...
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