E100 - port specified outside of module

[iamgame]

Hi All,

I am modifying an existing functional model for my hardware to make it cycle accurate. I get aforesaid error, for my slightly longer hierarchy of classes. 

class Port {
    tlm_utils::simple_target_socket<Port> socket_; 
}
class Memory {
      Port *port;
}
class TlmMemory::public ExistingMemory{
    Memory *mem;
}

class TlmModule :: public ExistingModule { 
    TlmModule(sc_module_name nm); //socket connection is done here.
    tlm_utils::simple_initiator_socket<TlmModule> socket_; 
    TlmMemory *tlmMem;
}
      
class ExistingModule :: public ExistingModuleBase {
}
      
class ExistingModuleBase :: public ExistingDesignBase {
}
      
class ExistingDesignBase :: public sc_core::sc_module {
}

However I do not get the error with following, however this is not what I would ideally like to do -

class TlmModule :: public ExistingModule, public sc_core::sc_module { 
    TlmModule(sc_module_name nm); //socket connection is done here.
    tlm_utils::simple_initiator_socket<TlmModule> socket_; 
    TlmMemory *tlmMem;
}
      
class ExistingModule :: public ExistingModuleBase {
}
      
class ExistingModuleBase :: public ExistingDesignBase {
}
      
class ExistingDesignBase {
}

I would like request help about why my first method of putting sc_module at the bottom of my class hierarchy is not working.

Thanks. 

[Eyck]

AFAIK the first version should properly instantitate. Maybe you mess up within the constructor ...

Since this is not really source code it is hard to tell any further. Maybe you can provide a silghtly mor concrete example e.g. on https://www.edaplayground.com/

[iamgame]

Thanks Eyck. I guess I forgot to add important detail. Class ExistingDesignBase as mentioned in first version - is base for every module in design. There are about 40 modules in the design. And the top level class TlmModule, has few modules inside it. Could this lead up to any issue to sc_module hierarchy ? I observed that this message is thrown from sc_port.cpp if the check for parent of sc_module fails. 

Thanks

 

 

[Eyck]

I guess your problem stem from a particular implementation detail in SystemC: if you have an inheritance hierarchy you should declare all constructor parameters as ' my_module( sc_core::sc_module_name const& nm). For the leaf module can leave it as 'MyModule(sc_core::sc_module_name nm)'. In the second case a copy of the module name is created which manipulates the hierarchy stack of the kernel. I assume this way you srew up your design.

It is save to always pass the sc_module_name by const reference in the constructors. This would makeup for a good rule in a modleing guideline