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Khushi

UVM-ML connecting SystemC ports

By Khushi, in UVM Simulator Specific Issues

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Khushi    0

Khushi
Posted

Hi

In UVM_ML, how to connect the following ports (from SystemC-TLM model to rest of the UVM verification env)

- sc_in<int>

- sc_out<bool>

-sc_port<my_if<T1>>

- sc_export<my_if<T1>>

 

Thanks

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