calvapete Posted December 21, 2011 Report Share Posted December 21, 2011 Hi Guys, I was wondering if any of you have a method to drive a systemverilog interface using a uvm_driver, while the interface is already internally connected within the dut? Either that or to replace a single internal dut module instance with an empty one? So it is not being driven by another internal module instance. We are building up IPs that are made up of a number of modules all connected using systemverilog interfaces. My Environment has a couple of agents which I can override in the factory and point to whichever physical interface I like. So as we build up the IP we can test the blocks as add them. To avoid managing a large number of different filelists and/test harnesses, I would like my regressions to be able use the same environment as well as whatever the current dut is. However this means I need to drive an interface which has been connected internally (i.e. when the first block level testcase was written there would be no other dut module in place, but as the dut gets developed the interface gets connected to another module). What I need to do is to be able to disconnect an interface so I can drive it from the testbench. The monitor side is fine as monitors are passive so I can connect them to whichever interface I like. Any ideas? Quote Link to comment Share on other sites More sharing options...
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