hrishikeshadn Posted April 19, 2016 Report Share Posted April 19, 2016 In case of UVM ,config_db can be accessed in any component or object which helps mainly the dynamic creation of component/models.Whether any option is present in SYSTEM C ? Quote Link to comment Share on other sites More sharing options...
Martin Barnasconi Posted April 19, 2016 Report Share Posted April 19, 2016 The SystemC class library itself does not support this configuration functionality. The UVM-SystemC class library obviously adds this functionality, since we target exactly the same functionality and features as UVM-SystemVerilog. Quote Link to comment Share on other sites More sharing options...
hrishikeshadn Posted April 20, 2016 Author Report Share Posted April 20, 2016 Thank You for the Info Quote Link to comment Share on other sites More sharing options...
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